Showing posts with label Xilinx. Show all posts
Showing posts with label Xilinx. Show all posts

Wednesday, July 14, 2021

Xilinx ACAP integrates fast memory, connectivity, adaptable compute

Xilinx introduced its latest Versal HBM adaptive compute acceleration platform (ACAP), which integrate the most advanced HBM2e DRAM, providing 820GB/s of throughput and 32GB of capacity for 8X more memory bandwidth and 63% lower power than DDR5 implementations.

The Versal HBM series is architected to keep up with the higher memory needs of the most compute intensive, memory bound applications for data center, wired networking, test and measurement, and aerospace and defense.

“Many real-time, high-performance applications are critically bottlenecked by memory bandwidth and operate at the edge of their power and thermal limits,” said Sumit Shah, senior director, Product Management and Marketing at Xilinx. “The Versal HBM series eliminates those bottlenecks to provide our customers with a solution that delivers significantly higher performance and reduced system power, latency, form factor, and total cost of ownership for data center and network operators.”

Key features of the Versal HBM devices:

  • power-optimized networking cores for high bandwidth, secure connectivity
  • 5.6Tb/s of serial bandwidth with 112Gb/s PAM4 transceivers
  • 2.4Tb/s of scalable Ethernet bandwidth
  • 1.2Tb/s of line rate encryption throughput
  • 600Gb/s of Interlaken connectivity, and 
  • 1.5Tb/s of PCIe Gen5 bandwidth with built-in DMA, supporting both CCIX and CXL.

Xilinx says the new Versal HBM ACAPs deliver the network scalability and performance needed for 800G routers, switches, and security appliances. Sampling is expected in the first half of 2022. 

Wednesday, June 9, 2021

Xilinx debuts Versal AI Edge series processors

Xilinx introduced the Versal AI Edge series processors, boasting 4X the AI performance-per-watt versus GPUs and 10X greater compute density versus previous-generation adaptive SoCs.

Xilinx is positioning the new Versal AI Edge adaptive compute acceleration platforms (ACAPs) for a range of applications including: automated driving with the highest levels of functional safety, collaborative robotics, predictive factory and healthcare systems, and multi-mission payloads for the aerospace and defense markets. The portfolio features AI Engine-ML to deliver 4X machine learning compute compared to the previous AI Engine architecture and integrates new accelerator RAM with an enhanced memory hierarchy for evolving AI algorithms. These architectural innovations deliver up to 4X AI performance-per-watt versus GPUs and lower latency resulting in far more capable devices at the edge.

"Edge computing applications require an architecture that can evolve to address new requirements and scenarios with a blend of flexible compute processing within tight thermal and latency constraints,” said Sumit Shah, senior director, Product Management and Marketing at Xilinx. “The Versal AI Edge series delivers these key attributes for a wide range of applications requiring greater intelligence, making it a critical addition to the Versal portfolio with devices that scale from intelligent edge sensors to CPU accelerators.”

The Versal AI Edge series takes the production-proven 7nm Versal architecture and miniaturizes it for AI compute at low latency, all with power efficiency as low as six watts and safety and security measures required in edge applications. As a heterogeneous platform with diverse processors, the Versal AI Edge series matches the engine to the algorithm, with Scalar Engines for embedded compute, Adaptable Engines for sensor fusion and hardware adaptability, and Intelligent Engines for AI inference that scales up to 479 (INT4) TOPS2—unmatched by ASSPs and GPUs targeting edge applications—and for advanced signal processing workloads for vision, radar, LiDAR, and software defined radio.

Sampling is available to early access customers, with shipments expected during the first half of 2022.

https://www.xilinx.com/versal-ai-edge

Tuesday, May 4, 2021

Xilinx posts revenue of $851M, cites strength in wireless and data center


Citing strength in wireless and data center applications, Xilinx posted record revenues of $851 million for its fiscal fourth quarter, up 6% over the previous quarter and an increase of 13% year over year. Fiscal 2021 revenues were $3.15 billion, largely flat from the prior fiscal year.

GAAP net income for the fiscal fourth quarter was $188 million, or $0.75 per diluted share. Non-GAAP net income for the quarter was $204 million, or $0.82 per diluted share. GAAP net income for fiscal year 2021 was $647 million, or $2.62 per diluted share. Non-GAAP net income for fiscal year 2021 was $762 million, or $3.08 per diluted share.

“We are pleased with our fourth quarter results as we delivered record revenues and double-digit year-over-year growth in the midst of a challenging supply chain environment,” said Victor Peng, Xilinx president and CEO. “Xilinx saw further improvement in demand across a majority of our diversified end markets with key strength in our Wireless, Data Center and Automotive markets, the pillars of our growth strategy. Our teams have executed well and we remain focused on continuing to meet customers’ critical needs.

https://investor.xilinx.com/investor-relations



Tuesday, April 20, 2021

Xilinx introduces adaptive system-on-modules for edge

Xilinx introduced its "Kria" portfolio of adaptive system-on-modules (SOMs), production-ready small form factor embedded boards for edge-based applications. 

The Xilinx SOM roadmap includes a full range of products, from cost-optimized SOMs for size and cost-constrained applications to higher performance modules that will offer developers more real-time compute capability per watt. 

The first product available in the Kria SOM portfolio, the Kria K26 SOM, specifically targets vision AI applications in smart cities and smart factories. It is built on top of the Zynq UltraScale+ MPSoC architecture, which features a quad-core Arm Cortex-A53 processor, more than 250 thousand logic cells, and a H.264/265 video codec. The SOM also features 4GB of DDR4 memory and 245 IOs, which allow it to adapt to virtually any sensor or interface. With 1.4 tera-ops of AI compute, the Kria K26 SOM enables developers to create vision AI applications offering more than 3X higher performance at lower latency and power compared to GPU-based SOMs, critical for smart vision applications like security, traffic and city cameras, retail analytics, machine vision, and vision guided robotics.

“Xilinx’s entrance into the burgeoning SOM market builds on our evolution beyond the chip-level business that began with our Alveo boards for the data center and continues with the introduction of complete board-level solutions for embedded systems,” said Kirk Saban, vice president, Product and Platform Marketing at Xilinx. “The Kria SOM portfolio expands our market reach into more edge applications and will make the power of adaptable hardware accessible to millions of software and AI developers.”

http://www.xilinx.com/kria

Sunday, March 21, 2021

Xilinx shrinks its UltraScale+ FPGAs with TSMC's InFO packaging

Xilinx expanded its UltraScale+ portfolio for markets with new applications that require ultra-compact and intelligent edge solutions. 

The company's Artix and Zynq UltraScale+ devices are now available in TSMC’s state-of-the-art InFO (Integrated Fan-Out) packaging technology, which is up to 70% smaller than traditional chip-scale packaging. 

“Demand for compact, intelligent edge applications is driving the requirement for processing and bandwidth engines to not only provide higher performance, but also new levels of compute density to enable the smallest form factor systems,” said Sumit Shah, senior director, Product Line Management and Marketing at Xilinx. “The new cost-optimized additions to our UltraScale+ portfolio are powerful enhancements that leverage the architecture and production-proven technology of Xilinx’s UltraScale+ FPGAs and MPSoCs, which collectively have been deployed in millions of systems worldwide.”

The Artix UltraScale+ family is built on its production-proven FPGA architecture and is designed for a range of applications including machine vision with advanced sensor technology, high-speed networking, and ultra-compact “8K-ready” video broadcasting. 

Artix UltraScale+ devices deliver 16 Gbps transceivers to support emerging and advanced protocols in networking, vision, and video, while also delivering the highest DSP compute in its class.

Tuesday, February 23, 2021

Xilinx debuts new family of Alveo SmartNICs and AI video analytics

Xilinx introduced a new family of Alveo SmartNICs, smart world AI video analytics applications, an accelerated algorithmic trading reference design for sub-microsecond trading, and a Xilinx App Store - all aimed at next gen data centers and workloads.

The Xilinx Alveo SN1000 SmartNICs, which is based on the Xilinx 16nm UltraScale+ architecture, are powered by the low-latency Xilinx XCU26 FPGA and a 16-core Arm processor. The SN1000 SmartNICs deliver dual-QSFP ports for 10/25/100Gb/s connectivity with leading small packet performance and a PCIe Gen 4 interconnect. The first model in the family is the SN1022, which is offered in a full height, half-length form factor in a 75-Watt power envelope.

The Alveo SN1000 SmartNICs deliver software-defined hardware acceleration for all function offloads. SN1000 SmartNICs directly offload CPU intensive tasks to optimize networking performance, with an open architecture that can accelerate a broad range of network functions at line rate. Programmability is provided via the company's Vitis Networking platform and industry standard, high-level programming languages such as P4, C, and C++. 

SN1000 SmartNICs provide software-defined hardware acceleration for a wide range of networking, security, and storage offloads, such as Open vSwitch and virtualization acceleration (Virtio.net). Security offloads include IPsec, kTLS and SSL/TLS and accelerated storage applications including Virtio.blk, NVMe over TCP, Ceph, and compression and crypto services.

“Data centers are transforming to increase networking bandwidth and optimize for workloads like artificial intelligence and real-time analytics,” said Salil Raje, executive vice president and general manager, Data Center Group at Xilinx. “These complex, compute-intensive and constantly-evolving workloads are pushing existing infrastructure to its limits and driving the need for fully composable, software-defined hardware accelerators that provide the adaptability to optimize today’s most demanding applications as well as the flexibility to quickly take on new workloads and protocols, and accelerate them at line rate.

In addition, Xilinx is launching an AI video analytics platform with an ecosystem of partner solutions built to accelerate the most complex and latency-sensitive AI video inferencing applications. One example use case is retail video analytics, where accelerated video processing could help identify key trends in consumer behavior.

https://www.xilinx.com/applications/data-center/network-acceleration/alveo-sn1000.html

Thursday, February 4, 2021

Fujitu leverages Xilinx for O-RAN 5G radios

Xilinx is supplying its  UltraScale+ technology to Fujitsu Limited for its O-RAN 5G radio units (O-RUs), which will be deployed in the first O-RAN-compliant 5G greenfield networks in the U.S. Fujitsu is also evaluating Xilinx RFSoC technology to further reduce cost and power consumption for additional future site deployments.

"We are proud to collaborate with Fujitsu in the development of their multi-generation 5G radio units using our industry-leading UltraScale+ solutions, which will be deployed in a major greenfield 5G network,” said Liam Madden, executive vice president and general manager, Wired and Wireless Group at Xilinx. “As the market needs for 5G continue to evolve, Fujitsu also recognized the importance of integrating Xilinx adaptable RFSoCs to address the evolution of standards for next-generation radio deployments.”

“Our Fujitsu design team worked closely with Xilinx on our O-RAN radio units to enable greater flexibility and cost savings while also delivering greater innovation as well as new capabilities for 5G networks,” said Masaki Taniguchi, senior vice president and head of the Mobile System Business Unit at Fujitsu. 

https://www.xilinx.com/applications/wired-wireless/wireless.html

Tuesday, November 24, 2020

Xilinx and Texas Instruments partner on 5G radios

Xilinx is collaborating with Texas Instruments (TI) to develop scalable and adaptable digital front-end (DFE) solutions to increase energy efficiency of lower antenna count radios. 


The collaboration will combine Xilinx's Zynq UltraScale+ MPSoC family and adaptable RF IP with the AFE7769 quad-channel RF transceiver from TI.

Xilinx's Adaptable Digital RF IP includes specialist functionality of Crest Factor Reduction (CFR) and Digital Pre-distortion (DPD). It can support a wide range of radio bandwidths and carrier configurations. Also, by being tightly integrated with the rest of the PHY processing implemented in the Zynq UltraScale+ MPSoC device, it can handle the increasingly complex signal dynamics of multi-RAT and 5G waveforms which are challenging for standalone DPD implementations. The PA technology is also evolving quickly to address these new radio requirements with broader adoption of GaN and new architectures. 

“Critical to the success of the radio platform is the efficiency and performance of the RF power amplifier (PA). Even for low-power small cell applications, the PA consumes over 50% of the power of a typical next-generation radio and is therefore key to driving the OPEX and CAPEX,” said Liam Madden, executive vice president and general manager, Wired and Wireless Group at Xilinx. “A scalable and adaptable DFE solution that can address current and future PA efficiency needs is key for the advancement of 5G platforms.” 

“PA linearity for spectral efficiency and RF power delivery is key to achieving the performance benefits of 5G New Radio systems. Wide-bandwidth transceivers like the AFE7769 help to address higher-order PA nonlinearities and enable more efficient power delivery,” said Karthik Vasanth, vice president and business unit manager, data converters, at TI. “With this implementation, designers can address the market needs for higher instantaneous bandwidth and antenna counts to support MIMO (multiple-input, multiple-output) applications while also offering scalability to meet system cost targets.”

http://www.xilinx.com

Tuesday, October 27, 2020

AMD to acquire Xilinx for $35 billion

AMD agreed to acquire Xilinx in an all-stock transaction valued at $35 billion. The acquisition price represents approximately $143 per share of Xilinx common stock.

The deal significantly expands AMD’s product portfolio, which will now cover CPUs and GPUs, with Xilinx's FPGAs, Adaptive SoCs and software expertise. The combined company's addressable market will now include industry growth segments from the data center to gaming, PCs, communications, automotive, industrial, aerospace and defense.

“Our acquisition of Xilinx marks the next leg in our journey to establish AMD as the industry’s high performance computing leader and partner of choice for the largest and most important technology companies in the world,” AMD President and CEO Dr. Lisa Su said. 

“We are excited to join the AMD family. Our shared cultures of innovation, excellence and collaboration make this an ideal combination. Together, we will lead the new era of high performance and adaptive computing,” said Victor Peng, Xilinx president and CEO. “Our leading FPGAs, Adaptive SoCs, accelerator and SmartNIC solutions enable innovation from the cloud, to the edge and end devices. We empower our customers to deploy differentiated platforms to market faster, and with optimal efficiency and performance. Joining together with AMD will help accelerate growth in our data center business and enable us to pursue a broader customer base across more markets.”

Some highlights of the combined company

  • Dr. Lisa Su will lead the combined company as CEO. Xilinx President and CEO 
  • Victor Peng, will join AMD as president responsible for the Xilinx business and strategic growth initiatives
  • 13,000 engineers
  • $2.7 billion of annual1 R&D investment
  • Post-closing, current AMD stockholders will own approximately 74 percent of the combined company Immediately accretive to AMD margins, cash flow and EPS 
  • Combined revenue of $11.6B 




Wednesday, October 21, 2020

Xilinx posts sales of $767 million - strength in data center and automotive

 Xilinx reported revenues of $767 million for the second quarter of its fiscal year 2021, up 5% sequentially but down 8% from the same period last year.

GAAP net income for the quarter was $194 million, or $0.79 per diluted share. Non-GAAP net income was $203 million, or $0.82 per diluted share.

“We are pleased with our fiscal second quarter performance, which came in above the mid-point of guidance,” said Xilinx president and CEO Victor Peng. “Our strong results were driven by another record quarter in our Data Center Group and Aerospace & Defense businesses, as well as improvement in our Automotive and Broadcast end markets. In addition, RFSoC sales ramped meaningfully with a tier-1 wireless OEM customer for 5G radio deployment in North America.

“Our strategic transformation to an adaptive platform company continues with healthy design win momentum during the quarter. Notable customer wins included a marquee SmartNIC design win with a U.S. tier-1 hyperscaler, as well as Zynq MPSoC design wins with Subaru and Continental. We also remain on track with our Versal program ramp with a leading wireless OEM later this year.”

“Xilinx business continued to strengthen in fiscal Q2, buoyed by the economic recovery and increasing demand across our broad set of end markets,” said Xilinx CFO Brice Hill. “This drove better than expected sequential revenue growth of 5% and GAAP operating income growth of 17%, resulting in $232 million of free cash flow and $93 million in capital return to stockholders with our quarterly dividend. Our financial position is strong and we remain confident as we prepare to expand the Zynq and Versal product lines and capture additional growth opportunities.”

Wednesday, September 16, 2020

Xilinx samples its own telco accelerator card

Xilinx has begun sampling its own T1 Telco Accelerator Card for O-RAN distributed units (O-DUs) and virtual baseband units (vBBUs) in 5G networks. 

The card, which uses the same field-proven Xilinx silicon and IP already being deployed in 5G networks, comes in a multi-function PCIe form factor card which performs both O-RAN fronthaul protocols and layer 1 offload. The card provides advanced workload offload capabilities, enabling a dramatic reduction in the number of CPU cores required in a system. The T1 card also enables the O-DU to deliver greater 5G performance and services while reducing overall system power consumption and cost compared to competitive offerings.

The T1 card is a small form factor, single-slot card that can be plugged into standard x86 or non-x86 servers to achieve the real-time protocol processing performance required for 5G virtualized O-DU platforms. In addition, it offloads line-rate and compute-intensive functions including: channel encoding/decoding using hardened LDPC and Turbo codecs, rate matching/de-matching, HARQ buffer management, and more, freeing the processor cores for running other services - the true promise of virtualization. The T1 card simplifies 5G deployments by offering a turnkey solution through ecosystem partners that includes both O-RAN fronthaul and 5G NR layer 1 reference designs, as well as pre-validated software to enable operators, system integrators, and OEMs to get to market quickly.

Xilinx says the offloading of critical channel coding functions from the CPU to the T1 card delivers up to 45x encoding and 23x decoding throughput improvement relative to the same server without acceleration. The T1 card enables the use of fewer CPU cores, driving down system cost and overall power consumption. Additionally, for O-RAN fronthaul termination, it can process multiple sectors of 5G NR 4TRX at 100 MHz OBW with its 50 Gbps of optical ports. The Fronthaul and L1 bandwidths are matched for optimal scalability; the more towers you want, the more cards you add to the server.

“The trend toward network virtualization and O-RAN has given us an opportunity with the Xilinx T1 Telco Accelerator Card to drive the next steps of disaggregation of standard networks, enabling our expansion into every corner of the 5G market,” said Dan Mansur, vice president of marketing, Wired and Wireless Group, Xilinx. “Working closely with our ecosystem partners, Xilinx hardware, IP and software are leading the innovation and realization of 5G O-RAN networks.”


Wednesday, September 9, 2020

Ribbon announces 5G slicing based on Xilinx

Ribbon Communications is developing a 5G hybrid slicing solution in collaboration with Xilinx. Further details are expected later this month.

"Today's announcement highlights our leadership and innovation in packet optical networking," said Sigal Barda, Ribbon's VP of Product and Head of 5G Portfolio. "Our hybrid slicing capabilities enable operators to simultaneously deliver tomorrow's resource-intensive and low latency 5G services while gaining operational efficiencies from their networks, thereby maximizing the value of their infrastructure investment."

"We value our relationship with Ribbon and the advances we've made in the packet optical networking space together," said Safy Fishov, Vice President of Sales for North America and Europe, Wired and Wireless Group at Xilinx. "Thanks to our leading Virtex UltraScale+ technology, design services, and FLEX-E solution, Ribbon is helping to move the industry forward, offering an elegant hybrid slicing solution to support new 5G use and business cases including network sharing, private networks slices, and new mobile-based services online for gaming and eHealth."\

Thursday, July 30, 2020

Xilinx sees strength in data center product and some order acceleration

Xilinx reported revenues of $727 million for the first quarter of its fiscal year 2021,  exceeding initial guidance and in-line with revised guidance. GAAP net income for the quarter was $94 million, or $0.38 per diluted share. Non-GAAP net income was $160 million, or $0.65 per diluted share.

The company noted record Data Center Group (DCG) revenue, with 10% sequential and 104% annual growth. Wireless Group (WWG) revenue increased 27% sequentially.

“Our fiscal Q1 revenue was well above the initial guidance despite ongoing business challenges from COVID-19 and global trade issues,” said Xilinx president and CEO Victor Peng. “Results were driven by strength in the Data Center Group (DCG), Wired and Wireless Group (WWG), and the Industrials market, offsetting expected headwinds in consumer-oriented end markets, including Automotive and Broadcast. The outperformance was due to a combination of strength in multiple end markets, as well as some order acceleration driven by recent additional U.S. government trade restrictions on sales of certain Xilinx products to some customers based, or with operations, in China.”

http://investor.xilinx.com/

Monday, June 29, 2020

Xilinx raises its revenue guidance

Xilinx raised the range of its prior guidance for its first quarter of fiscal 2021 ended June 27, 2020. The new expectations are as follows:

“While we have seen some COVID-19 related impacts during the June quarter, our business has generally performed well overall, with stronger than expected revenues in our Wired and Wireless Group and Data Center Group more than offsetting weaker than expected revenues in our consumer-oriented end markets, including automotive, broadcast, and consumer. A portion of the revenue strength in the quarter was due to customers accelerating orders following recent changes to the U.S. government restrictions on sales of certain of our products to international customers,” said Victor Peng, Xilinx’s President and Chief Executive Officer.

“Given our preliminary assessment of the expected financial results in the June quarter, we are raising the midpoint for revenue and narrowing our overall guidance ranges. Furthermore, we are updating our expected tax rate for the June quarter to include the prior and current year potential impacts of the Altera Corp. v. Commissioner tax case, a third-party legal proceeding concerning related-party R&D cost sharing arrangements and stock-based compensation. The potential impact for prior years is approximately $57 million while the impact to the fiscal 2021 expected tax rate is an additional 1%-2%.”

Tuesday, May 26, 2020

Xilinx spins 20-nm, radiation-tolerant, space-grade FPGAs

Xilinx introduced a 20-nanometer (nm) space-grade FPGA, offering full radiation tolerance and ultra-high throughput and bandwidth performance for satellite and space applications.

The new 20nm Radiation Tolerant (RT) Kintex UltraScale XQRKU060 FPGA provides true unlimited on-orbit reconfiguration, over a 10x increase in digital signal processing (DSP) performance – ideal for payload applications – and full radiation tolerance across all orbits.

The XQRKU060 offers rich DSP capabilities optimized for dense power-efficient compute. It is equipped with 2,760 UltraScale DSP slices and provides up to 1.6 TeraMACs of signal processing compute, more than a 10X increase compared to the prior generation, as well as dramatic efficiency gains for floating point computations. The increased compute capability in space is paired with massive I/O bandwidth from 32 high-speed transceivers (SerDes) that can run up to 12.5Gbps to deliver 400Gbps aggregate bandwidth.

The XQRKU060 also features robust 40x40mm ceramic packaging capable of withstanding vibrations and handling during launch as well as radiation effects in harsh orbit environments. The architecture features an innovative design for single event effects (SEE) mitigation thereby meeting the industry requirements for all orbits, including low earth orbit (LEO), medium earth orbit (MEO), geosynchronous orbit (GEO), and deep space missions.

“With our extensive history in developing leading-edge, radiation tolerant technology and deploying this in reliable space-grade solutions, Xilinx continues its lead with the launch of the world’s most advanced process node for space,” said Minal Sawant, space systems architect, Aerospace and Defense Vertical Marketing, at Xilinx. “The 20nm RT Kintex UltraScale FPGA is breaking industry standards and setting a new benchmark for meeting the high compute requirements of high bandwidth payloads, space exploration and research missions.”

Wednesday, April 22, 2020

Xilinx posts quarterly revenue of $756 million

Xilinx announced revenues of $3.16 billion for fiscal year 2020, up 3% from the prior fiscal year. Revenues were $756 million for the fourth quarter of fiscal year 2020, up 5% from the prior quarter and down 9% year over year.

GAAP net income for fiscal year 2020 was $793 million, or $3.11 per diluted share. Non-GAAP net income for fiscal year 2020 was $853 million, or $3.35 per diluted share. GAAP net income for the March quarter was $162 million, or $0.65 per diluted share. Non-GAAP net income for the March quarter was $193 million, or $0.78 per diluted share.

“Despite our fiscal 2020 being uniquely challenging, particularly related to the US trade-related restrictions with Huawei as well as some COVID-19 impact during our Q4, we were able to deliver another record year with revenue of $3.16 billion, a 3% increase over fiscal 2019,” said Xilinx president and CEO Victor Peng. “The strength and diversity of our business were reflected in the results of our fiscal fourth quarter with strong sequential growth in both revenue and profitability.”

“There remains a high degree of uncertainty in the global business environment given the impact of COVID-19 which creates challenges with visibility beyond the near term. Therefore, we believe it is prudent to provide only quarterly guidance at this time. We will continue to closely monitor business conditions. Lastly, I want to thank our employees for their continued focus and commitment in these challenging times.”

The Xilinx Board of Directors declared a quarterly cash dividend of $0.38 per outstanding share of common stock payable on June 3, 2020 to all stockholders of record at the close of business on May 13, 2020. The declared dividend represents a 2.7% increase over the prior quarter’s dividend and reflects Xilinx’s commitment to growing the dividend.

http://www.xilinx.com

Wednesday, April 15, 2020

Samsung Electronics picks Xilinx ACAP

Samsung Electronics Co. will use the Xilinx Versal adaptive compute acceleration platform (ACAP) for worldwide 5G commercial deployments.

Xilinx Versal ACAPs provide a universal, flexible and scalable platform that can address multiple operator requirements across multiple geographies. The devices can be used to perform the real-time, low-latency signal processing demanded by beamforming algorithms. The AI Engines, which are part of the Versal AI Core series, are comprised of a tiled array of vector processors.

“Samsung has been working closely with Xilinx, paving the way for enhancing our 5G technical leadership and opening up a new era in 5G,” said Jaeho Jeon, executive vice president and head of R&D, Networks business, Samsung Electronics. “Taking a step further by applying Xilinx’s new advanced platform to our solutions, we expect to increase 5G performance and accelerate our leadership position in the global market.”

“Samsung is a trailblazer when it comes to 5G innovation and we are excited to play an essential role in its 5G commercial deployments,” said Liam Madden, executive vice president and general manager, Wired and Wireless Group, Xilinx. “Versal ACAPs will provide Samsung with the superior signal processing performance and adaptability needed to deliver an exceptional 5G experience to its customers now and into the future.”

The first Versal ACAP devices have been shipping to early access customers and will be generally available in the Q4 2020 timeframe.

Thursday, April 9, 2020

Xilinx appoints Brice Hill as CFO

Xilinx appointed Brice Hill to the position of executive vice president and chief financial officer (CFO), effective immediately. He joins Xilinx from a 25-year tenure at Intel Corporation, where he most recently served as the CFO and COO, Technology, Systems and Core Engineering Group, managing all financial aspects of the company’s manufacturing, research and development, and product engineering operations.

Prior to that, Hill was Corporate Vice President of Corporate Strategy and Business Unit finance, including the Data Center, PC, and IoT business units. Hill had also previously held senior finance roles in capacity strategy, PC desktop and chipsets, and the data center at Intel.

Tuesday, January 21, 2020

Xilinx files patent infringement complaint against Analog Devices

Xilinx filed a patent infringement lawsuit against Analog Devices, asserting infringement of eight United States patents in the United States District Court for the District of Delaware. The filing came as a counterclaim to the an existing lawsuit between the firms.

Xilinx said its lawsuit details the unauthorized use by Analog Devices of certain Xilinx technologies involving serializers/deserializers (SerDes), high-speed analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), as well as mixed-signal devices targeting 5G and other markets. In addition to seeking damages, Xilinx is requesting that Analog Devices be enjoined from selling, offering to sell, or importing into the United States, products that infringe Xilinx’s asserted patents.

Wednesday, October 2, 2019

Xilinx intros Unified Software Platform for developers

At its second annual XDF event in San Jose, California, Xilinx introduced a unified developer software platform to drive applications powered by its programmable silicon.

Xilinx said it spent five years and a total of 1,000 man years to create the new platform, called Vitis (pronounced VÄ«-tis), which tailors the Xilinx hardware architecture to the software or algorithmic code without the need for hardware expertise.

The Vitis platform was designed to plug into common software developer tools and uses open source libraries. The base layer is the Vitis target platform, which includes a board and preprogrammed I/O. The second layer, called the Vitis core development kit, encompasses the open-source Xilinx runtime library to manage the data movement between different domains, including the subsystems, the AI Engine in the forthcoming Versal ACAP™, as well as an external host, if required. This layer also includes the core development tools such as compilers, analyzers and debuggers. While Xilinx provides a world-class design environment, these tools are designed to integrate seamlessly with industry-standard build systems and development environments. In the third layer are more than 400 optimized and open-source applications across eight Vitis libraries.

"With exponentially increasing compute needs, engineers and scientists are often limited by the fixed nature of silicon," said Victor Peng, president and chief executive officer, Xilinx. "Xilinx has created a singular environment that enables programmers and engineers from all disciplines to co-develop and optimize both their hardware and software, using the tools and frameworks they already know and understand. This means that they can adapt their hardware architecture to their application without the need for new silicon."