Showing posts with label Silicon. Show all posts
Showing posts with label Silicon. Show all posts

Wednesday, March 28, 2018

Ambarella intros next gen CV2 computer vision processor

Ambarella, which specializes in low-power, HD and Ultra HD video processing semiconductors, announced its next generation CV2 computer vision processor, which will provide up to 20 times the computer vision performance of CV1 in a fully-integrated SoC. Key features of the 10nm CV2 Computer Vision SoC:

  • CVflow processor with CNN/deep learning support
  • 4Kp60/8-Megapixel AVC and HEVC encoding with multi-stream support
  • Multi-sensor support for 3-channel electronic mirror and 4-channel AVM systems, multi-channel stereo sensing systems (up to 4 stereo pairs), and multi-imager IP cameras
  • Quad-core 1.2-GHz ARM™ Cortex A53 with NEON DSP extensions and FPU
  • Advanced security features, including OTP for secure boot, TrustZone and IO virtualization
  • Real-time hardware-accelerated 360-degree de-warping and Lens Distortion Correction (LDC) engine

Ambarella also demonstrated a fully autonomous EVA (Embedded Vehicle Autonomy) vehicle on Silicon Valley roads.

Ambarella's autonomous car leverages the company's embedded computer vision processors. The company said its EVA’s high-resolution stereovision cameras deliver the 360-degree short and long distance viewing capability required for advanced perception and precise self-location. EVA includes sensor fusion of the vision information with Radar and map data to provide the information necessary for path planning and merging maneuvers without the need for additional LiDAR systems.

“High resolution 8-Megapixel stereovision combined with superior perception in challenging lighting conditions allows EVA to “see” its surroundings with much higher reliability than was previously possible,” said Professor Alberto Broggi, General Manager of Ambarella Italy. “Moving to an implementation based on dedicated Ambarella CVflow processors brings us much closer to making self-driving cars a practical reality.”

Wednesday, March 21, 2018

Samsung posts specs on its 10nm Exynos 7 Series 9610

Samsung Electronics Co. posted key specifications on its latest application processor (AP), the Exynos 7 Series 9610, for high-end smartphones.

The Exynos 9610 is built on Samsung’s 10-nanometer (nm) FinFET process. The CPU is comprised of four Cortex-A73 cores running at 2.3 gigahertz (GHz), and four 1.6GHz Cortex-A53 cores to load apps quickly and run multiple tasks simultaneously.

The GPU is a second-generation Bifrost-based ARM Mali-G72.

There is an embedded Cortex-M4F-based low-power sensor hub, which efficiently manages the sensors in real-time without waking the main processor.

The embedded all-network LTE modem supports Cat.12 3CA (carrier aggregation) at 600 Mbps for downlink and Cat.13 2CA at 150Mbps for uplink.

The processor also features 802.11ac 2x2 MIMO Wi-Fi, faster and longer range Bluetooth 5.0, and FM for radio. In addition, for global location positioning coverage, it embeds a 4-mode Global Navigation Satellite System (GNSS) receiver that includes GPS (Global Positioning System), GLONASS, BeiDou and Galileo.

The Exynos 7 Series 9610 is expected to be mass produced in the second half of this year.

Monday, March 12, 2018

Trump blocks Broadcom's proposed takeover of Qualcomm

President Trump signed an executive order prohibiting Broadcom from acquiring Qualcomm or proceeding with any substantially equivalent merger, acquisition, or takeover of the firm whether effected directly or indirectly.

The order cited "credible evidence" that Broadcom, along with its partners, subsidiaries, or affiliates, impairs the national security of the United States.

Trump said he was taking this action upon review of a recommendation from the Committee on Foreign Investment in the United States.

Broadcom issued a statement saying it was reviewing the order.

Qualcomm issued a statement saying all of Broadcom’s director nominees are also disqualified from standing for election as directors of Qualcomm. 'the company will reconvene its 2018 Annual Meeting of Stockholders on the earliest possible date. Stockholders of record on January 8, 2018 will be entitled to vote at the meeting.

Broadcom’s Terabit Monterey Chip extends Ethernet to LTE and 5G Radios

Broadcom introduced a terabit-class Ethernet switching chip designed for high-capacity cellular fronthaul networks.

The Broadcom Monterey Ethernet switch (BCM56670) targets Ethernet-based 5G radios and while also supporting existing CPRI-based radios.

It supports the IEEE’s new 802.1CM (Time-Sensitive Networking for Fronthaul) standard, which provides an Ethernet synchronization solution, CPRI-to-Ethernet bridging, and nanosecond-scale jitter and delay control.

IEEE 802.1CM specifies how to carry cellular radio traffic over Ethernet, It relies on pre-emption, Synchronous Ethernet, and the 1588 Precision Timing specification.

Broadcom said its Monterey silicon offers an order-of-magnitude increase in synchronization accuracy by moving time stampers from Ethernet MAC to SerDes I/O, exceeding 3GPP, IEEE, and ITU-T specifications for 4G & 5G networks.

Monterey Ethernet switch key attributes:

  • Transports CPRI across standard Ethernet
  • Enables cellular-system designers to leverage the merchant-silicon-based Ethernet ecosystem
  • Connects directly to new Ethernet-based radios and installed CPRI-based radios
  • Terabit-class capacity to meet the 10x increase in capacity needed by 5G networks
  • Serves as a critical component in building mobile-edge computing platforms
  • Hardware support for key 5G requirements, including nanosecond-scale synchronization

“We are very pleased to announce another ground-breaking solution that addresses fundamental problems and opens a new, major market for our switching products,” said Ram Velaga, vice present and general manager, Switch Products at Broadcom. “The Monterey Ethernet switch is an excellent example of Broadcom’s deep commitment to 5G innovation and strategic R&D investment.”
Sampling is underway.

Thursday, March 8, 2018

Microsemi's DIGI-G5 powers Terabit OTN switching cards

Microsemi introduced its DIGI-G5 Optical Transport Network (OTN) processor for terabit capacity OTN switching cards.

The company said this newest generation in its DIGI franchise enables packet-optical transport platforms to triple in capacity while slashing power consumption by 50 percent per port.

DIGI-G5 delivers 1.2 terabits per second (Tbps) of combined OTN and client interfaces and is first to market with newly standardized 25 Gigabit Ethernet (GE), 50GE, 200GE, 400GE, Flexible OTN (FlexO) and Flexible Ethernet (FlexE) with integrated security engine enabling flexible encrypted optical connections.

Transporting Ethernet, storage, intellectual property (IP)/ multiprotocol label switching (MPLS) and 4G/5G Common Public Radio Interface (CPRI)/eCPRI services over 100G OTN switched connections has proven to be the most fiber, power and cost-efficient deployment solution for moving bits in today's metro and long-haul networks.

“Our DIGI OTN processor portfolio has been instrumental in transforming service provider networks to mass deploy 100G OTN switched networks,” said Babak Samimi, vice president and business unit manager for Microsemi's Communications Business Unit. “Our DIGI-G5 breaks new ground by enabling the industry’s transition to new OTN 3.0 architectures at terabit scalability by delivering three times the port density while lowering power consumption by 50 percent per port.”

DIGI-G5 highlights

  • Total interface bandwidth of up to 1.2Tbps
  • Comprehensive Ethernet support: 10GE, 25GE, 50GE, 100GE, 200GE, 400GE and the new OIF FlexE specification
  • New OTN 3.0 rates, enabling flexible (FlexO) and fractional 100G+ (OTUCn, OTUCn-m) transmission
  • 56G PAM-4 Serializer/Deserializer (SerDes) allows direct connection to QSFP-DD, OSFP and coherent digital signal processors (DSPs)
  • Integrated packet test set enables remote troubleshooting and debug, driving down capital and operating expenditures
  • Integrated security engine enabling end-to-end AES-256 based encryption and authentication
  • Integrated G.HAO bandwidth-on-demand processing for OTN switching networks
  • Innovative DIGI-Mesh-Connect architecture which enables compact, pay-as-you-grow OTN switching at lowest cost and power by eliminating the need for a centralized switch fabric device.
  • Sampling is expected in Q2



Wednesday, March 7, 2018

Broadcom's Jericho2 switch-routing chip boasts 10 Tbps capacity

Broadcom announced commercial availability of its Jericho2 and FE9600 chips, the next generation of its StrataDNX family of system-on-chip (SoC) Switch-Routers.

The Jericho2 silicon boasts 10 Terabits per second of Switch-Router performance and is designed for high-density, industry standard 400GbE, 200GbE, and 100GbE interfaces. Key features include the company's "Elastic Pipe" packet processing, along with large-scale buffering with integrated High Bandwidth Memory (HBM).

The new device is shipping within 24 months from its predecessor Jericho+., Jericho2 delivers 5X higher bandwidth at 70% lower power per gigabit.

In addition to Jericho2, Broadcom is shipping FE9600, the new fabric switch device with 192 links of the industry's best performing and longest-reach 50G PAM-4 SerDes. This device offers 9.6 Terabits per second fabric capacity, a delivers 50% reduction in power per gigabit compared to its predecessor FE3600.

“The Jericho franchise is the industry’s most innovative and scalable silicon used today in various Switch-Routers by leading carriers,” said Ram Velaga, Broadcom senior vice president and general manager, Switch Products. “I am thrilled with the 5X increase in performance Jericho2 was able to achieve over a single generation. Jericho2 will accelerate the transition of carrier-grade networks to merchant silicon-based systems with best-in-class cost/performance.”

Wednesday, February 21, 2018

Broadcom trims its offer for Qualcomm to $79 per share

Broadcom trimmed its offer to acquire Qualcomm from $82 to $79 per share, but said it is still committed to pursuing the deal. The offer consists of $57 in cash and $22 in Broadcom shares.

The decision to cut the price follows Qualcomm's decision to increase its offer to acquire NXP Semiconductor from $110 to $127.50 per share.

Broadcom's proposed merger agreement otherwise remains unchanged, including the $8 billion regulatory reverse termination fee and 6% per annum (net of dividends) ticking fee accruing from and after the 12-month anniversary of the date of the merger agreement.

Tuesday, February 20, 2018

Qualcomm raises its bid for NXP to $127.50 per share in cash

Qualcomm increased its bid to acquires all outstanding shares of NXP Semiconductors to $127.50 per share in cash.

The previous price was $110.

Qualcomm also announced binding agreements with nine NXP stockholders who collectively own more than 28% of NXP’s outstanding shares (excluding additional economic interests through derivatives) to tender their shares at $127.50 per share.  These stockholders include funds affiliated with Elliott Advisors (UK) Limited and Soroban Capital Partners LP.

“Qualcomm’s leading SoC capabilities and technology roadmap, coupled with NXP’s differentiated position in Automotive, Security and IoT, offers a compelling value proposition.  We remain highly confident in our fiscal 2019 Non-GAAP EPS target of $6.75-$7.50, which includes $1.50 per share accretion from the acquisition of NXP.  With only one regulatory approval remaining, we are working hard to complete this transaction expeditiously.  Our integration planning is on track and we expect to realize the full benefits of this transaction for our customers, employees and stockholders,” stated Steve Mollenkopf, Chief Executive Officer of Qualcomm.


Monday, February 19, 2018

Elliott insists fair value for NXP is $135 per share

Elliott Advisors (UK), which holds an approximate 7.2% economic interest in NXP Semiconductors, is insisting that the take-out value for Qualcomm to acquire NXP should be higher than $135 per NXP share.

Elliot published a presentation in which it argues:

  • NXP is currently one of the most attractive companies in the semiconductor sector
  • NXP has a track record of consistent outperformance versus market expectations over the past year 
  • NXP top-line growth came in above consensus expectations in each of the past four quarters with growth in 2017 Q4 of 16.0% outpacing consensus by 5.8 percentage points;
  • NXP's performance has been driven by impressive results of “Core NXP” (i.e., the Automotive and Secure Connected Devices segments contributing approximately 69%2 of NXP total revenues)
  • In 2017 H2, NXP’s revenue growth was higher than the median growth for its peers, signaling NXP’s potential and giving credibility to consensus expectation that the company should grow faster than peers at 5.3% CAGR (1.5 percentage points ahead of the median for NXP’s peers);
  • NXP is uniquely placed to radically enhance Qualcomm's long-term strategy

http://www.fairvaluefornxp.com/


Broadcom sweetens its bid for Qualcomm


Broadcom boosted its unsolicited bid to acquire Qualcomm to $121 billion, or $82 per share, consisting of $60.00 in cash and the remainder in Broadcom shares. Broadcom described the bid as its "best and final offer", saying that it is prepared to pay to Qualcomm "a significant "reverse termination fee" in an amount appropriate for a transaction of this size in the unlikely event we are unable to obtain required regulatory approvals." Several conditions...

Elliott comments on Qualcomm's extended tender for NXP


Elliott Advisors (UK) published an advisory letter to investment funds that now collectively hold an increased economic interest in NXP Semiconductors N.V. of approximately 6.6%. The advisory argues that that NXP is of significant strategic importance to QUALCOMM Incorporated (“Qualcomm”) and that such a transaction will deliver substantial value to Qualcomm shareholders at prices meaningfully higher than Elliott’s own assessment of standalone intrinsic...

Acquisition still not done - Qualcomm extends cash tender offer for NXP shares


Qualcomm extended the offering period of its previously announced cash tender offer to purchase all of the outstanding common shares of NXP Semiconductors N.V. (NASDAQ: NXPI). The tender offer is now scheduled to expire at 5:00 p.m., New York City time, on February 9, 2018, unless extended or earlier terminated, in either case pursuant to the terms of the Purchase Agreement. American Stock Transfer & Trust Company, the depositary for the tender...

Elliott Advisors says Qualcomm's bid for NXP is too low


Elliott Advisors (UK), which advises funds that collectively hold an economic interest in NXP Semiconductors of approximately 6%, published an open letter stating that Qualcomm's offer to acquire the company is too low. Elliot believes NXP is worth $135 per share on an intrinsic standalone basis – far above the $110 offered by Qualcomm. Elliott states Qualcomm’s offer of $110 per share is acting as "a ceiling on NXP’s valuation", noting that NXP’s...


Wednesday, February 7, 2018

Intel intros Xeon D-2100 for edge

Intel introduced a system-on-chip processor in its Xeon line that is architected to address the needs of edge applications and other data center or network applications.

The new Intel Xeon D-2100 processors include up to 18 “Skylake-server” generation Intel Xeon processor cores and integrated Intel QuickAssist Technology with up to 100 Gbps of built-in cryptography, decryption and encryption acceleration.

Intel said this processor will be supported by system software updates to protect against the Spectre and Meltdown security exploits.

In addition to edge deployments in communications service provider networks, other use cases for the Intel Xeon D-2100 processor include:
  • Storage: The Intel Xeon D-2100 processor is an option for density-optimized, lightweight hyperscale cloud workloads such as dynamic web serving, memory caching, dedicated hosting and warm storage.
  • Content Delivery Networks (CDNs): The processors can bring higher performance to content delivery at the network edge, which is critical to keep latency low for streaming media to viewers and those working in media fields with massive files.
  • Enterprise networks: The processor family also targets entry enterprise SAN and NAS storage, midrange routers, network appliances, security appliances, wireless base stations and embedded midrange IoT usages, among others.
“To seize 5G and new cloud and network opportunities, service providers need to optimize their data center and edge infrastructures to meet the growing demands of bandwidth-hungry end users and their smart and connected devices,” said Sandra Rivera, senior vice president and general manager of the Network Platforms Group at Intel. “The Intel Xeon D-2100 processor allows service providers and enterprises to deliver the maximum amount of compute intelligence at the edge or web tier while expending the least power.”

Tuesday, February 6, 2018

MACOM and ST team to bring GaN on silicon to mainstream RF

MACOM and STMicroelectronics have agreed to develop GaN (Gallium Nitride) on Silicon wafers to be manufactured by ST for MACOM’s use across an array of RF applications.

MACOM said the deal provides it with increased Silicon wafer manufacturing capacity and improved cost structure. This could displace incumbent Silicon LDMOS and accelerate the adoption of GaN on Silicon in mainstream markets. ST and MACOM have been working together for several years to bring GaN on Silicon production up in ST’s CMOS wafer fab. As currently scheduled, sample production from ST is expected to begin in 2018.

“This agreement punctuates our long journey of leading the RF industry’s conversion to GaN on Silicon technology. To date, MACOM has refined and proven the merits of GaN on Silicon using rather modest compound semiconductor factories, replicating and even exceeding the RF performance and reliability of expensive GaN on SiC alternative technology,” said John Croteau, President and CEO, MACOM. “We expect this collaboration with ST to bring those GaN innovations to bear in a Silicon supply chain that can ultimately service the most demanding customers and applications.”

“ST’s scale and operational excellence in Silicon wafer manufacturing aims to unlock the potential to drive new RF power applications for MACOM and ST as it delivers the economic breakthroughs necessary to expand the market for GaN on Silicon,” said Marco Monti, President of the Automotive and Discrete Product Group, STMicroelectronics. “While expanding the opportunities for existing RF applications is appealing, we’re even more excited about using GaN on Silicon in new RF Energy applications, especially in automotive applications, such as plasma ignition for more efficient combustion in conventional engines, and in RF lighting applications, for more efficient and longer-lasting lighting systems."

Monday, February 5, 2018

Broadcom sweetens its bid for Qualcomm

Broadcom boosted its unsolicited bid to acquire Qualcomm to $121 billion, or $82 per share, consisting of $60.00 in cash and the remainder in Broadcom shares.

Broadcom described the bid as its "best and final offer", saying that it is prepared to pay to Qualcomm "a significant "reverse termination fee" in an amount appropriate for a transaction of this size in the unlikely event we are unable to obtain required regulatory approvals."

Several conditions were placed on the new offer, including that Qualcomm completes its own acquisition of NXP on current terms or that this merger be sracapped. A second condition is that Qualcomm not delay or adjourn its annual meeting past March 6, 2018.

Ampere emerges from stealth with 64-bit ARM server designs

Ampere, a start-up based in Santa Clara, California, emerged from stealth and revealed its plans for 64-bit ARM-based server processors aimed at hyperscale cloud applications and next-generation data centers.

Ampere Computing is headed by Renee James, the former president of Intel until 2016. Its team also includes three other Intel veterans: Atiq Bajwa, Chief Architect, and foremerly VP and GM of product architecture at Intel; Rohit Avinash Vidwans, Executive Vice President of Engineering, with 25 years experience at Intel including work on Xeon microprocessors for data center and enterprise servers; and Greg Favor, Senior Fellow, and 25 years experience at Intel including over 60 patents. Ampere is backed by The Carlyle Group.

Ampere said its processors will offer a high performance, custom core Armv8-A 64-bit server operating at up to 3.3 GHz, 1TB of memory at a power envelope of 125 watts. It will also offer mixed signal I/O features including PCIE Gen 3, SATA Gen 3, USB and workload accelerators, as well as the high-performance on-chip fabric. The processors are sampling now and will be in production in the second half of the year.

In October, The Carlyle Group acquired the compute business of AppliedMicro from MACOM, which earlier in 2017 acquired Applied Micro Circuits Corporation (AppliedMicro") in a deal was valued at approximately $770 million on the day it was announced.

In March 2017, AppliedMicro announced the sampling of its third generation 16-nanometer FinFET Server-on-a-Chip (SoC) solution, X-Gene 3.  The device is an ARMv8-A compatible processor that matches comparable x86 processors in CPU throughput, per-thread performance, and power efficiency while offering advantages in memory bandwidth and total cost of ownership. It features 32 ARMv8-A 64-bit cores operating at speeds up to 3.0 GHz, eight DDR4-2667 memory channels with ECC and RAS supporting up to 16 DIMMs and addressing up to 1TB of memory and 42 PCIe Gen 3 lanes with eight controllers.

“We have an opportunity with cloud computing to take a fresh approach with products that are built to address the new software ecosystem,” said James. “The workloads moving to the cloud require more memory, and at the same time, customers have stringent requirements for power, size and costs. The software that runs the cloud enables Ampere to design with a different point of view. The Ampere team’s approach and architecture meets the expectation on performance and power and gives customers the freedom to accelerate the delivery of the most memory-intensive applications and workloads such as AI, big data, storage and database in their next-generation data centers.”

Wednesday, January 31, 2018

Broadcom brings new Ethernet programmability with open source logical table software

Broadcom is introducing a new approach to Ethernet switch configuration that makes use of open source software to allow network hard vendors, OS vendors and even enterprise network managers to monitor, analyze, and provision switch resources through a standard software interface.

This capability is enabled by a new Software Development Kit Logical Table (SDKLT) for Broadcom switch ASICs that leverages table-based programming, where all the device physical resources such as MAC Address Tables, L3 route tables, TCAMs, etc. are exposed as logical tables. Device-specific information is stored in databases and not embedded in the APIs. Device-specific behavior is managed by logical tables through a small set of APIs. Broadcom said this approach introduces new ways to monitor, analyze and provision switch resources, all through industry standard automation tools. The company is making this logical table programmability available as an open source SDK.

Broadcom's first open source offering of the SDKLT is for BCM56960 Tomahawk switch, which is widely used in data center top-of-rack (TOR) switches. The SDKLT open source code is posted on GitHub. The open source code and the Logical Table APIs are released under Apache 2.0 license. The software is designed for High Availability (HA) including support for Soft Error Recovery, Warmboot, and In Service Upgrades.

“The SDKLT brings a fresh, state-of- the-art software development approach to the broader community of network software developers where they can now fully and directly control and monitor the rich switch feature set optimized for SDN and cloud use cases,” said Ram Velaga, senior vice president and general manager of switching products.

Monday, January 29, 2018

Nokia's ReefShark silicon cuts massive MIMO antenna size and power consumption

Nokia unveiled its ReefShark 5G chipsets for radio frequency (RF) units such as the radio used in antennas. The chipsets, which were developed in-house, significantly improve radio performance resulting in halving the size of massive MIMO antennas. Nokia says its ReefShark chipsets also reduce power consumption in baseband units by 64%, compared to current technology.

The ReefShark chipsets comprise:

  • ReefShark Digital Front End for LTE and 5G radio systems supporting massive MIMO
  • ReefShark RFIC front-end module and transceiver: massive MIMO Adaptive Antenna solution
  • ReefShark Baseband Processor: All-in-one compute heavy design, capable of supporting the massive scale requirements of 5G. This is the brain power of baseband processing.

The ReefShark chipsets for compute capacity are delivered as plug-in units for the commercially available Nokia AirScale baseband module. The new plug-in units triple throughput from 28 Gbps today to up to 84 Gbps per module. Additionally, AirScale baseband module chaining supports base station throughputs of up to 6 terabits per second. Nokia said this level of performance will allow operators to meet the huge growing densification demands and support the massive enhanced mobile broadband needs of people and devices in megacities.

Nokia also announced that it is working with 30 operators using ReefShark and will ramp up field deployments during the third quarter of 2018.

Henri Tervonen, CTO of Nokia Mobile Networks and head of R&D Foundation said: "With ReefShark, Nokia has created a clear competitive advantage. Its combination of power, intelligence and efficiency make it ideally suited to be at the heart of fast arriving 5G networks."

Thursday, January 25, 2018

Intel's data centric revenue grew 21% in Q4

Intel reported Q4 2017 revenue of $17.1 billion and record full-year revenue was $62.8 billion. Excluding McAfee, fourth-quarter revenue grew 8 percent year-over-year with data-centric revenue up 21 percent, and full-year revenue grew 9 percent year-over-year.


  • Data-centric businesses, which accounted for 47% of Intel's fourth-quarter revenue, an all-time high.
  • The Data Center Group (DCG), Internet of Things Group (IOTG) and Programmable Solutions Group (PSG) all achieved record quarterly revenue. 

"2017 was a record year for Intel with record fourth-quarter results driven by strong growth of our data-centric businesses," said Brian Krzanich, Intel CEO. “The strategic investments we've made in areas like memory, programmable solutions, communications and autonomous driving are starting to pay off and expand Intel's growth opportunity. In 2018, our highest priorities will be executing to our data-centric strategy and meeting the commitments we make to our shareholders and our customers."

Wednesday, January 24, 2018

Samsung Foundry builds a collaborative ecosystem

Samsung Electronics is launching an ecosystem program to foster collaboration between the Samsung Foundry and customers. The goal is to deliver competitive and robust System on Chip (SoC) designs based on certified key design components including Process Design Kit (PDK), reference flows with Design Methodologies (DM), Intellectual Property (IP), and ASIC design support.

The Samsung Advanced Foundry Ecosystem (SAFE) program has three elements:

  • EDA/DM: Provides extensively tested PDKs and reference flows (with design methodologies) that are backed by Samsung Foundry’s certification.
  • IP: Provides a full set of silicon qualified, application specific IP offerings from the early stage of process technology development. Customers can view a full list of IP solutions offered through SAFE™ by accessing Samsung Foundry’s B2B site, CONNECT 
  • Design Services: Connects mid- to small-sized companies with qualified ASIC design services and support. Using design service partners of SAFE™, customers will benefit from easy access to process technology information, competitive price conditions, and committed resources for their SoC design success.

Thursday, January 11, 2018

Broadcom's 12.8 Tbps Tomahawk 3 in perspective

Broadcom describes its Tomahawk 3 as a quantum leap in switch power and cost efficiency for next-gen hyperscale data centres. There are four arguments for this: (1) Tomahawk3 offers scalable forwarding for container networking based on rich tunneling support and support for segment routing (2) Scale-Out, Configurable Load Balancing & Multipathing, which provide traffic load adaptive capabilities in the switch (3) Broadview Gen3 network instrumentation based on in-band telemetry with per-packet timestamping and mirroring (4) 40% reduced Watt/Gbps thanks to the chip’s 16nm geometry.

Broadcom’s BroadView software generates network analytics directly from the switching silicon, providing a way for network telemetry to collected.

Tomahawk3 also brings a high-performance integrated SerDes on chip, specifically, up to 256 x 50G-PAM4/25G-NRZ Dual-Mode SerDes. This enables 50G PAM-4 Based Ethernet Speeds, including 50GbE (1-lane), 100GbE (2-lane), 200GbE (4-lane), and 400GbE (8-lane). High-density port configurations for hyperscale spine switches based on the 12.8 Tbps Tomahawk3 could be:
  •         128 x 100GE
  •         64 x 200GE
  •         32 x 400GE

Broadcom is also offering an 8.0 Tbps version of the Tomahawk3 that could be used for 100G Top-of-rack switches with the following port combinations:
  •         80 x 100GE
  •         48 x 100GE + 8 x 400GE or 16 x 200GE
  •         96 x 50GE + 8 x 400GE or 16 x 200GE


The Broadcom universe

Finally, its worth considering the wide scope of partners and customers in the Broadcom switching ecosystem.



Till this point, pretty much all the major switch OEMs/ODMs are aboard. The big cloud vendors are building their own switches in-house but with Broadcom silicon. If there has been competitive pressure for this type of switch, mostly it would be from manufacturers opting to build switching ASICs in-house rather than rely on Broadcom solution. But there are a few start-ups attempting to enter the market.

Innovium will soon launch a 12.8 Tbps switch

In March 2017, Innovium, a start-up based in San Jose, California and backed by $90 million in venture funding, announced plans for a new line of TERALYNX scalable Ethernet silicon for data centers switches with aggregate capacity options at 12.8Tbps, 9.6Tbps, 6.4Tbps and 3.2Tbps performance points. Though the chips have yet to begin shipping to our knowledge at least, in an updated blog posting this week, Innovium revealed that initial its initial systems will be available in early part of 2018 and that the company expects its customer and partners to disclose further details at that time. Innovium says it has active engagements with leading customers across all categories: Cloud, OEMs & ODMs.

Innovium’s TERALYNX silicon promises support for 10/25/40/50/100/200/400GbE Ethernet standards. It will deliver 128 ports of 100GbE, 64 ports of 200GbE or 32 ports of 400GbE in a single device.

From the Innovium Ethernet switching silicon spec sheet:
  •         12.8Tbps, 9.6Tbps, 6.4Tbps and 3.2Tbps single chip performance options at packet sizes of 300B or smaller
  •         Single flow performance of 400Gbps at 64B minimum packet size, 4x vs alternatives
  •         70MB of on-chip buffer for superior network quality, fewer packet drops and substantially lower latency compared to off-chip buffering options
  •         Up to 128 ports of 100GbE, 64 ports of 200GbE or 32 ports of 400GbE, which enable flatter networks for lower Capex and fewer hops
  •         Support for cut-through with best-in-class low latency of less than 350ns
  •         Programmable, feature-rich INNOFLEX forwarding pipeline
  •         Comprehensive layer 2/3 forwarding and flexible tunneling including MPLS
  •         Large table resources with flexible allocation across L2, IPv4 and IPv6
  •         Line-rate, standards-based programmability to add new/custom features and protocols
  •         FLASHLIGHT telemetry and analytics to enable autonomous data center networks
  •         Extensive visibility and telemetry capabilities such as sFlow, FlexMirroring along with highly customizable extra-wide counters
  •         P4-INT in-band telemetry and extensions to dramatically simplify end to end analysis
  •         Advanced analytics enable optimal resource monitoring, utilization and congestion control allowing predictive capabilities and network automation

Innovium was co-founded by Rajiv Khemani, formerly COO of Cavium; Puneet Agarwal, former Senior Director and Distinguished Engineer at Broadcom; and Mohammad Issa, previously VP Engineering at Broadcom. Its investors include Greylock Partners, Walden International, Capricorn Investment Group, S-Cubed Capital, Redline, and Qualcomm Ventures.

Barefoot is shipping a 6.5 Tbps switching chip

Barefoot Networks, a start-up based in Palo Alto, California and backed by over $130 million in venture funding including an investment from Google, is already shipping a 6.5 Tbps version of its “Tofino” user programmable switching silicon. The silicon is designed for user programmability via the open-source P4 programming language.

Barefoot has previously stated that its technology is being adopted by large enterprises and telecommunications providers to increase network performance and efficiency through leveraging programmable forwarding plane technology.

One publicly disclosed example is AT&T, which has tested Barefoot’s Tofino and In-band Network Telemetry (INT) to gain deep insight into the network down to packet-level. Barefoot stated that it has recently worked with AT&T and SnapRoute to deliver what it believes is the first real-time path and latency visualisation.

Earlier this month, Barefoot introduced “Deep Insight” software, which can run on commodity servers and in a network powered by switches based on the "Tofino" programmable switch chip to interpret, analyze and pinpoint packet telemetry. Using stateful baselining of a network's performance, the company says its software automatically filters out irrelevant data, detecting only anomalies at any time scale and with nanosecond resolution. The Deep Insight software can track the sequence of switches the packet visited along its path, the set of rules it matched upon at every switch along the way, the time it spent buffered in every switch, to the nanosecond, and the packets, flows and application that the packet shared each queue with.

Barefoot Networks was co-founded by Nick McKeown, a Stanford professor and co-founder of Nicira (acquired by VMware), Martin Izzard, Pat Bosshart, and Dan Lenoski VP Engineering. In February 2017, Barefoot named Craig Barratt as President and Chief Executive Officer.  Barratt joined Barefoot from Alphabet and Google, where he was Senior Vice President at Google and Chief Executive Officer of Alphabet’s Access business, which includes the Google Fiber broadband internet service. Prior to Google, he served as President of Qualcomm Atheros.

Thursday, January 4, 2018

Sercomm debuts LTE-M IoT button with 3-year battery life

Sercomm, which is a global manufacturer and supplier of telecom equipment and devices, introduced an LTE IoT button device,

The button connects to the cloud via LTE Cat M1 (any carrier frequency worldwide), and is designed to sustain up to two thousand clicks. It measures 65 x 65 x 25 mm.

As a "one-click button" the device could be programmed for a range of IoT applications, such as mobile ordering of products or supplies, triggering of automatic alerts, or provisioning of logistical services or maintenance tasks that occur at irregular intervals.

The button was designed and manufactured by Sercomm and based on Sequans’ Monarch LTE Cat M1/NB1 Platform, which provides support for power saving mode (PSM) and extended discontinuous reception (eDRX) to enable the long battery life needed by many IoT use cases. Battery life is estimated 3 years. Sequans’ Monarch is already certified by Verizon and AT&T and in the certification process with many other carriers.

Xilinx names Victor Peng as its new CEO

Xilinx named Victor Peng as its next president and chief executive officer, replacing Moshe Gavrielov, who will step down as CEO and from the board of directors on January 28th.

Since joining the company in 2008, Peng has spearheaded industry-leading strategy and technical shifts across the company’s portfolio of products and services, resulting in three consecutive generations of core product leadership and significant technology breakthroughs in integration and programming.  Most recently,

Peng joined Xilinx in 2009 and currently serves as Chief Operating Officer. He was appointed as a member of the board of directors in October 2017. Before joining Xilinx, Peng served as corporate vice president of the graphics products group (GPG) silicon engineering at AMD.

See also