Showing posts with label PAM4. Show all posts
Showing posts with label PAM4. Show all posts

Monday, May 18, 2020

Cadence offers 56G Long-Reach PAM4 SerDes IP

Cadence Design Systems released 56G long-reach SerDes IP on TSMC’s N7 and N6 process technologies.

The company expects 56G connectivity to be particularly important for 5G infrastructure deployment, both in baseband and remote radio head systems. To address this broader market, Cadence has expanded its PAM4 SerDes portfolio with 56G long-reach SerDes IP on the TSMC N7 and N6 processes delivering optimized power, performance and area (PPA).

The Cadence 56G long-reach SerDes IP highlights:

  • Best-in-class 36db+ insertion loss using Cadence’s multi-rate DSP technology
  • Industrial temperature range, CPRI data rate support and per-lane PLL are ideal for 5G applications
  • 56G long-reach performance has been achieved on N7 test silicon and is compatible with the N6 process
  • Fully compliant with the IEEE standard specification
  • Programmable power configurations via a unique firmware-controlled adaptive power optimizer, which provides optimal power and performance tradeoffs and more efficient system designs based on platform requirements
  • Optimal data recovery through the programmable DSP-based architecture, which allows optimal power delivery for a given reach and provides superior data recovery under lossy and noisy channel conditions
  • Improved flexibility enabled by the extended reach capability lets customers use lower cost PCBs and achieve greater flexibility in PCB and system design

“We are pleased to see Cadence expand its PAM4 offerings to include 56G and extend support to TSMC N7 and N6 process technologies,” said Suk Lee, senior director of the Design Infrastructure Management Division at TSMC. “This joint effort combining Cadence’s leading edge SerDes IP and TSMC’s advanced process technologies will help our customers unleash their silicon innovations for emerging 5G and hyperscale data center applications.”

“After being first to market in 2019 with silicon-proven 112G-LR SerDes on TSMC 7nm technology, we have now expanded our offering to include PPA-optimized 56G-LR to address the connectivity needs of the 5G infrastructure and AI/ML market. This new PAM4-based 56G-LR SerDes is based on Cadence’s well-proven multi-rate DSP technology,” said Rishi Chugh, vice president of product marketing, IP Group at Cadence. “The availability of Cadence’s 56G long-reach SerDes IP on the TSMC N7 and N6 processes accelerates the adoption and deployment of cost-effective 100G and 400G networks.”

http://www.cadence.com/go/56GSerDes

Keysight and Credo collaborate on PAM-4-to-NRZ

Keysight Technologies introduced a test solution that enables data center operators to leverage 400 Gigabit Ethernet (GE) capable test ports to link with and test legacy 100GE network equipment.

The new test solution is comprised of Keysight’s Ixia AresONE 400GE High Performance Layer 1 through 3 test system based on Pulse Amplitude Modulation level-4 (PAM4) signaling interconnected to legacy 100GE non-return-to-zero (NRZ) networking equipment ports using Credo’s HiWire Active Electrical Cable (AEC) technology. This collaboration provides speed-shifting of the signaling rates and forward error correction (FEC) conversion.

The companies said their combined test solution bridges the signaling gap between incompatible PAM4- and NRZ-encoded signaling. It removes potential compromises in testing configurations to improve overall performance validation and quality. The AEC cable technology performs the necessary conversions to allow a PAM4-encoded port to interoperate with an NRZ-encoded port. The solution provides support for testing four ports of 100GE NRZ from a single port of 400GE QSFP-DD PAM4 in 4x100GE speed mode.

“Data center operators are faced with a complex environment and need to leverage their existing investments for the future,” said Ram Periakaruppan, vice president, product development, Keysight’s Network Applications & Security group. “The Ixia AresONE 400GE test system supports Credo’s interconnect technology in high density 100GE test beds, enabling data center operators to accelerate validation of 100GE NRZ devices and network infrastructure while leveraging 400GE-capable PAM-4 ports to support demand in the future.”

Thursday, April 2, 2020

uSenlight employs MaxLinear's PAM4 DSPs for 400G modules

uSenlight Corporation, a key OEM developing high speed, high performance, reliable integrated optical modules for datacenter, FTTx, optical networking and CPRI/LTE applications, has selected MaxLinear’s MxL93542, Telluride PAM4 DSP, to develop its next-generation 400G-DR4 and FR4 optical modules.

The new optical modules build upon the success of uSenlight’s current product offerings of 100G QSFP28 PSM4 and 100G QSFP28 CWDM4 modules for data center connectivity. uSenlight’s experience in data center transceiver design and its manufacturing capabilities enable them to meet the growing demands of hyperscale data center customers.

MaxLinear’s MxL935xx Telluride PAM4 DSPs are key components in the development of high-speed, mega-scale data centers based on 100Gbps single lambda optical interconnects. MaxLinear’s SOCs offer integrated electro-absorption modulated laser (EA-EML) drivers for 100/400Gbps optical interconnects and breakout mode clocking support for 400Gbps DR4 optical modules. The MxL93542 400G PAM4 DSP allows companies like uSenlight to develop a 400Gbps optical interconnect module in a compact form factor for intra-datacenter applications with a transmission distance up to 2 kilometers.

“Telluride DSPs offer industry leading integration, power consumption, and link-margin performance,” said Will Torgerson, Vice President and General Manager of MaxLinear’s High-Speed Interconnect Group. "We are pleased to see that these features will enable uSenlight to develop next-generation 400G-DR4 and FR4 optical modules to address the massive demand to deploy higher speed networks in next-generation hyperscale data centers.”

“MaxLinear’s MxL93542 PAM4 DSP with integrated EML driver offers the highest level of integration compared with other DSPs on the market,” said Dr. Charles Wu, President of uSenlight Corporation. “The integration and performance of the MxL93542 PAM4 DSP is enabling us to expand our portfolio by developing 400Gbps optical interconnects for hyperscale datacenters.”

http://www.maxlinear.com/MxL93542

Thursday, January 9, 2020

Inphi milestone: 100,000 COLORZ silicon photonics PAM4 units shipped

Inphi noted a company milestone -- the shipment of more than 100,000 COLORZ units, its Silicon Photonics PAM4 platform solution for 80km DWDM connectivity in a QSFP28 form factor.

Inphi said its unique approach in integrating PAM4 CMOS with silicon photonics enables the platform to achieve a 60% in cost and a 75% in power savings. Accomplishing the COLORZ ramp to 100k within a span of only three years also validates the network inflection point in the adoption of switch pluggable DWDM optics.

Initially developed for the requirements of Microsoft, the COLORZ platform solution has now been deployed by more than 40 network operators, ranging from wireless carriers to military and educational networks. The operational simplicity combined with the economic value proposition continues to drive the adoption of COLORZ in the market place.

“We are excited to announce this milestone as its both an extraordinary achievement for the DCI market and for Inphi,” said Dr. Ford Tamer, Chief Executive Officer at Inphi. “This significant accomplishment underscores Inphi’s commitment to delivering technological innovations that dramatically increase the speed of data movement between data centers and help reduce total cost of ownership for cloud network operators.”

Yousef Khalidi, Corporate Vice President, Azure Networking, Microsoft Corp. said, “Inphi shares our vision for DCI connectivity and we applaud their achievement of a significant milestone. Inphi’s COLORZ platform has been an important contributor to Microsoft’s high bandwidth metro design, to help enable greater cloud performance in a highly scalable solution.”

http://www.inphi.com

Tuesday, January 7, 2020

Anritsu intros Oscilloscope 53-Gbaud Clock Recovery Unit

Anritsu introduced a Clock Recovery Unit (CRU) option for its BERTWave MP2110A oscilloscope that supports trigger clock generation from a 53-Gbaud PAM4 optical signal.

When combined with existing oscilloscope functionality, the new 53-Gbaud CRU can evaluate various PAM4 optical modules during development and manufacturing compared to solutions requiring external sampling oscilloscopes.

Anritsu said it developed the 53-Gbaud CRU for the BERTWave MP2110A sampling oscilloscope to address expanding PAM4 signal analysis requirements. The solution is more economical than a sampling oscilloscope that requires a separate trigger clock signal synchronized with the data signal to conduct PAM4 measurements. This is due to the fact that optical modules outputting PAM4 signals typically do not have a trigger signal. The BERTWave MP2110A can be used by engineers to more efficiently evaluate the physical layer of 25G to 400G optical transceiver modules and equipment components, such as optical cables, used by data centers, Core/Metro networks, 4G/5G mobile backhaul, and 5G mobile fronthaul.

https://www.anritsu.com/en-US/test-measurement/news/news-releases/2019/2019-12-20-us01

Wednesday, November 6, 2019

Anritsu intros 116G PAM4 error detector for 400 GbE and 800 GbE

Anritsu introduced a PAM4 Error Detector (ED) module supporting 116-Gbps bit error rate tests for its Signal Quality Analyzer-R MP1900A series.

Anritsu said its MP1900A instrument delivers error-free measurement of PAM4 signals at 116 Gbpss with industry-best operation bit rates and high Rx sensitivity performance. Combined with the previously released MP1900A series PAM4 Pattern Generator that supports high-accuracy BER measurements of PAM4 signals, the BERT allows engineers to accurately evaluate bit error rates of 400 GbE/800 GbE communications equipment and devices.



Anritsu releases 400GbE PAM4 BER Test

Anritsu announced the commercial release of its 64-Gbaud PAM4 Pulse Pattern Generator (PPG) and 32-Gbaud PAM4 Error Detector (ED) for use in 400GbE testing.

The new PAM4 BERT modules can be installed in the Anritsu Signal Quality Analyzer-R MP1900A series to implement a bit-error-rate test solution using either the 26.5625 Gbaud PAM4 x 8 lanes or 53.125- Gbaud PAM4 x 4 lanes methods. When using the PAM4 method to encode data as four amplitude levels, the gap between signal levels is one-third compared to the NRZ method, which reduces the unit time per symbol at higher baud rates, emphasizing the importance of signal quality in achieving high-speed transmissions.

Thursday, October 10, 2019

Teledyne LeCroy offer protocol analysis and jamming PAM4

Teledyne LeCroy is offering a highly integrated Ethernet and Fibre Channel protocol analysis and impairment system.

The SierraNet M648 platform provides traffic capture and manipulation for testing application or link characteristics. It supports examination of Ethernet and Fibre Channel links utilizing both Pulse Amplitude Modulation 4 (PAM4) and legacy Non-Return to Zero (NRZ) technologies.
The SierraNet M648 combines the exceptional Teledyne LeCroy expertise for physical layer testing with triggering, analysis and debug functions for a wide range of current and evolving SAN and LAN specific protocols (i.e. NVMe-oF™, FCoE, iSCSI, and TCP/IP).

https://teledynelecroy.com/protocolanalyzer/fibre-channel/sierranet-m648

Monday, September 23, 2019

Inphi announces volume production of 100G and 400G PAM4 platform

Inphi announced volume production of its 100Gbps and 400Gbps Single-Lambda Pulse Amplitude Modulation (PAM4) platform for data center and cloud networking applications.

Inphi’s Porrima PAM4 platform is a 56GBaud solution that includes linear TIA and drivers.

“Production availability of our Porrima PAM4 platform is aligned well with the data center expansion and is critical to meeting the rapidly increasing bandwidth needs in today’s cloud computing and hyper-scale data center environments,” said Eric Hayes, SVP, Networking Interconnect at Inphi. “Inphi continues to expand its technology and market leadership position in PAM4 data center and cloud infrastructure, and as a result are seeing a tremendous amount customer design win momentum supporting our now six generations of DSP developments. Inphi continues to drive next generation optical designs providing an ease of use API-based DSP software suite that achieves quick time-to-market with the right trade-offs in power and performance for data center optical interconnects.”

Porrima PAM4 DSP Product Family:
Porrima PAM4 DSP IC provides a full bi-directional interface with host ASICs that have 28GBaud PAM4and NRZ electrical interfaces, while bridging to 56GBaud optics. The product family can support PAM4 or NRZ signaling, and both Retiming and Gearbox functionality with packaging specifically designed for the following optics modules:

  • Porrima 400G – 8x56Gbps PAM4 <-> 4x100Gbps PAM4 for QSFP-DD/oSFP/COBO
  • Porrima 100G – 4x25Gbps NRZ <-> 1x100Gbps PAM4 for QSFP
  • Porrima 100G – 2x50Gbps PAM4 <-> 1x100Gbps PAM4 for QSFP/uQSFP/SFP-DD

Porrima Linear Drivers:

The IN5630DE/IN5634SE is a 56GBaud low power single/quad linear driver for PAM4 optical modules. Features include:

  • Excellent linearity, high bandwidth, adjustable gain to optimize the PAM4 system performances
  • Low-power modulator driver in small package or in bare die form

Porrima Linear TIA’s:
The IN5661TA/5664TA is a 56GBaud low power single/quad linear TIA for PAM4 optical modules. Features include:

  • Wide dynamic range to meet the different performance and link requirements for optical applications
  • Excellent signal integrity necessary for PAM4 modulation schemes
  • Low-power and small form factor


Wednesday, September 18, 2019

MaxLinear announces PAM4 DSPs optimized for 100G

MaxLinear announced the extension of its Telluride 100G per wavelength PAM4 DSP family with the availability of the MxL93515 and MxL93516, optimized for 100G applications.

MaxLinear said its second-generation DSPs offer significantly lower power and smaller footprint, comfortably enabling sub-3.5W QSFP28 designs while also meeting the form factor needs of the smaller SFP-DD/DSFP optical modules. Like its first-generation DSPs, the MxL93516 includes a monolithically integrated EA-EML laser driver.

The new MxL93515 and MxL93516 also feature a comprehensive digital pre-distortion (DPD) engine in the transmit direction to compensate for laser non-linearity and to cancel packaging limitations that cause reflections and bandwidth degradation at these extremely high signal frequencies. This DPD engine combined with the integrated EA-EML laser driver make these DSPs ideally suited for uncooled EA-EML lasers offering a substantially lower cost model to compete against existing 100G PSM4/CWDM4/LR4.

All Telluride DSPs include an auto-adaptive signal enhancement engine that enables robust SNR and BER performance. The engine integrates a continuous time linear equalizer (CTLE), automatic gain control (AGC), a feed forward equalizer (FFE), and a decision feedback equalizer (DFE).

The MxL93515 and MxL93516 are available in a tiny 7mm x 8.5mm package that supports both 4x25Gbps NRZ (QSFP28) and 2x50Gbps (SFP-DD/DSFP) PAM4 signals on the electrical interface. The package includes either an integrated 1.8Vpp EA-EML laser driver or a differential output that supports an external silicon photonics driver.

“Following the spectacular success of our first-generation Telluride products, we optimized the power and cost of our second-generation devices to enable a new generation of 100G single lambda QSFP and SFP modules,” said Will Torgerson, Vice President and General Manager of MaxLinear’s High-Speed Interconnect Group. "Our second-generation Telluride DSPs combined with the need for fewer optical components will drive the cost per bit down across the industry and we anticipate single lambda 100G solutions to become a majority of the data center and front-haul deployments over the next 2-3 years.”

http://www.maxlinear.com/MxL93515

Monday, September 9, 2019

Anritsu to show 116-Gbps PAM4 error detector

At the upcoming ECOC 2019 in Ireland later this month, Anritsu will host demonstrations of its new 64,2GBaud NRZ / 58,2GBaud PAM4 Error Detector for the MP1900A Signal Quality Analyzer-R. The analyzer is a high-performance Bit Error Rate Tester (BERT) that accurately measures communications equipment, next-generation high-speed electronic and optical devices, including those for M2M and IoT applications, and optical transceivers used in high-end servers.

The new 64,2GBaud NRZ / 58,2GBaud PAM4 ED card for the MP1900A Signal Quality Analyzer-R is an R&D, high-performance Error Detector supporting signal integrity evaluation on high-speed interfaces. The new ED pluggable card offers switchable NRZ and PAM4 signal analysis, high-accuracy Bit and Symbol Error Ratio measurement, world-beating PAM4 Rx Sensitivity, Clock Recovery and Equalizer.

The  first demonstration will show the new PAM4 Error Detector card combined with the existing high quality PAM4 Pulse Pattern Generator, to prove key capabilities for signal integrity and compliancy testing towards the latest standards in 200G, 400G and 800G transmission, such as MSB/LSB Bit Error Ratio and PAM4 Symbol Error Ratio, up to 58,2G Clock Recovery, 58,2GBaud PAM4 Receiver Sensitivity down to 36mV, Received Signal Equalization to compensate the impact of losses from PCBs and cables.

As an additional unique value in the market, MP1900A multichannel signal generation, combined with 25/50/100/200/400G FEC patterns emulation and jitter tolerance testing, enables accurate evaluation of the true performance of optical transceiver modules in real life working conditions.

In a second joint demonstration with Teledyne-LeCroy, the MP1900A SQA-R Platform, ready for PCIe Gen3, Gen4 and Gen5, will be shown in full automatic calibration, Rx/Tx PCIe Device testing, Link Training verification and Jitter Tolerance validation. The stressed signal calibration will be performed on a Teledyne-LeCroy LabMaster oscilloscope with a single SW tool controlling the whole test system.
https://www.anritsu.com/en-US/test-measurement/news/news-releases/2019/2019-08-28-us02

Tuesday, September 3, 2019

Open Eye Consortium completes 53 Gbps single-mode spec

The Open Eye Consortium (Open Eye MSA) released its 53Gbps single-mode specification to its members, which defines the requirements for fully analog PAM-4 solutions for 50G SFP, 100G DSFP, 100G SFP-DD, 200G QSFP, and 400G QSFP-DD and OSFP single-mode modules.

The Open Eye MSA aims to accelerate the adoption of PAM-4 optical interconnects scaling to 50Gbps, 100Gbps, 200Gbps, and 400Gbps by expanding upon existing standards to enable optical module implementations using less complex, lower cost, lower power, and optimized analog clock and data recovery (CDR) based architectures in addition to existing digital signal processing (DSP) architectures.

Multi-vendor interoperability demonstrations of products based on the new specification will be showcased at CIOE 2019 in Shenzhen, China and ECOC 2019 in Dublin, Ireland in September. Further, the Open Eye MSA has already begun work on defining the multi-mode specification which is targeted for release in Spring 2020.

The Open Eye MSA extends membership to Anritsu, Dust Photonics, Fujitsu Optical Components, HG, Inopticals, Marvell, MultiLane, SAMTEC, and Tektronix.

MACOM and Semtech Corporation initiated the formation of the Open Eye MSA with 28 current members in Promoter and Contributing membership classes.

Promoters include: Applied Optoelectronics Inc., Cambridge Industries Group (CIG), Juniper Networks, Luxshare-ICT, MACOM, Mellanox, Molex, and Semtech Corporation.

Contributors include: Anritsu, Accelink, Cloud Light Technology, ColorChip, Dust Photonics, Fujitsu Optical Components, HG, InnoLight, Inopticals, Keysight Technologies, Marvell, Maxim Integrated, MultiLane, O-Net, Optomind, SAMTEC, Source Photonics, Sumitomo Electric and Tektronix.

http://www.openeye-msa.org

Thursday, September 27, 2018

ECOC 2018: Tektronix shows PAM4 test and debug solutions

At ECOC 2018, Tektronix showcased its optical test solutions, including:
  • PAM 4 Testing - DSA8300 sampling oscilloscope with an 80GHz optical sampling module showing support for IEEE 802.3bs based 400G optical testing for TDECQ, including new advances in high-sensitivity single-mode/multi-mode optical measurements for NRZ and PAM-4.
  • PAM 4 design and debug- DPO70000SX 70GHz ATI performance oscilloscope analyze single shot PAM-4 signals with live triggering and post-equalized error detection for 400G standards.
  • Complex Coherent testing - an end-to-end demonstration of optical modulation analysis software supporting multi-OMA systems, featuring the AWG70000 Series Arbitrary Waveform Generator and the DPO70000SX oscilloscope for applications such as spatial division multiplexing and more.
  • Support for new emerging standards - 400G ZR Receiver Testing - featuring the Tektronix DPO70000SX 70GHz ATI performance oscilloscope


Tuesday, September 25, 2018

ECOC 2018: Source Photonics and Huawei showcase PAM4-based transceivers

At ECOC 2018, Source Photonics is partnering with Huawei in showcasing 50G and 400G optical transceivers based on PAM4 technology.

The companies are participating in the Ethernet Alliance Interoperability Demonstration, which consists of multiple 400G and 50G links among participating network and test equipment manufacturers including Huawei.

Source Photonics said it is working with Huawei in providing operators an environmentally friendly and energy-efficient technology. The companies took the initiative this year in driving the development of optical modules based on 50G PAM4 technology. The PAM4 technology coupled with faster Baud Rates and higher density transceiver types are enabling 400G which is known to be key in migrating to higher speed networks.

“We took the lead worldwide when we successfully demonstrated interoperability of the first 400G QSFP-DD LR8 and 400G CFP8 LR8 transceivers at OFC 2018 in March. Source Photonics continues to take initiative as it collaborates with Huawei in developing IEEE optical standards for 50G PAM4 technology,” said Andy Xiao, PLM.

Source Photonics’ 400G CFP8 supports the IEEE 400GBASE-LR8 optical standard and 400GAUI-16 electrical interface. The module operates from 0°C to 70°C and complies with the CFP8 MSA and allows connections of up to 10km. The 50G LR QSFP28 uses a DML laser with mature TO package as a cost-effective solution for network migration.  This product will be available for purchase this month and will also be key in enabling 5G commercialization and other services requiring higher network bandwidth.

Source Photonics -- booth #416
Ethernet Alliance -- booth #618

Thursday, September 20, 2018

ECOC 2018: eSilicon to show 7nm 56G PAM4 long-reach SerDes

eSilicon plans to demonstrate the silicon performance of its 7nm 56G long-reach SerDes during ECOC 2018 (Anritsu booth #408).

eSilicon will show a periodic pattern generator (PPG)-to-chip live demo with different backplane reaches. Specifically, the demonstration will show 56G PAM4 data transfer running at 56Gb/s over two different BERTSCOPE channels with two different reaches, both driven by the Anritsu MP1900A Signal Quality Analyzer-R using a passive and an active PAM4 combiner. The demo with Anritsu is significant because it will show how it is possible to leverage TX finite impulse response (FIR) capabilities to increase performance and improve power figure of merit (FOM) and functionality. A key feature is high insertion loss tolerance with low bit-error rates to support increased bandwidth in legacy equipment.

“To obtain such reach and effectively stress the PAM4 SerDes receiver, it is very important to be able to generate an original extremely high-quality signal, and include equalization and stress tools for full control of the TX side. During the bring-up period, a flexible solution like Anritsu’s MP1900A is the best choice for an interoperability test,” said Anritsu EMEA Wireline Marketing Director Alessandro Messina.

Sunday, September 9, 2018

UNH-IOL intros 50/100/200/400 Ethernet - PAM4 testing

The University of New Hampshire InterOperability Laboratory (UNH-IOL) is introducing a testing service covering the new IEEE 802.3bs and the new IEEE 802.3cd specification for 50, 100, 200 and 400 Gigabit Ethernet based on PAM4 signaling.

The new services are for electrical and optical conformance testing of 50, 100, 200 and 400 Gigabit Ethernet specifications, with plans to offer interoperability testing as new higher speed Ethernet products enter into development and, eventually, the market.

UNH-IOL said the need for Ethernet speeds exceeding existing 100 Gigabit (based on 25G NRZ signaling) is being driven by exponentially increasing capacity demands across the board. Cloud service providers are looking to the higher efficiency and density that 50Gb/s PAM4 technologies (scalable up to 400Gb/s) Ethernet offers as they build out massive cloud-scale data centers, while the surge in mobile connectivity has telecoms pursuing higher speed Ethernet services. Additionally, bandwidth demand continues to grow at data centers tasked to service high-bandwidth, rich media applications such as video streaming, online gaming and digital marketing. In response, the UNH-IOL has taken a leading step to provide Ethernet stakeholders with testing services for 50, 100, 200 and 400 Gigabit through the multi-million dollar investment in new state of the art testing equipment.

“Today, a diverse array of applications and markets are driving the need for higher-speed, higher-density and lower cost connectivity solutions. Advances in new signaling technology is enabling the industry to rapidly deploy optimized solutions that achieve higher data rates to meet this demand,” said Mike Klempa, UNH-IOL Ethernet and Storage Technical Manager. “The investment in new equipment to test to these higher Ethernet speeds follows in line with UNH-IOL’s commitment to provide the most comprehensive Ethernet testing in a rapidly changing industry and also allows us to leverage our expertise in past 100Gb/s testing to help control testing costs at these evolving signaling types.”


Thursday, September 6, 2018

Anritsu adds 53 Gbaud upgrade for PAM4 optical signal analysis

Anritsu has released new firmware downloads for the BERTWave MP2110A Sampling Oscilloscope that boosts its PAM4 analysis function from 26 Gbaud to 53 Gbaud for the production and inspection of optical modules.

Anritsu notes that current optical modules such as CFP8s use 26-Gbaud PAM4 optical signals, while future mass-produced QSFP-DD and OSFP modules will use 53-Gbaud PAM4 optical signals. Its solution can be used to support the development and production-line inspection of next-generation QSFP-DD optical transceivers expected to be deployed in data centers.

The BERTWave MP2110A is an all-in-one measuring instrument with built-in multi-channel Bit Error Rate Tester (BERT) and Sampling Oscilloscope, supporting bit error rate (BER) measurements, Eye Mask tests, Eye pattern analyses, high sampling speed of 250 kSample/s and low-noise (3.4 μW) high-sensitivity O/E interface. The BERT and Sampling Oscilloscope are required instruments for evaluating optical modules used by optical communications systems.

As well as NRZ technology, the MP2110A also supports PAM4 signal measurements including TDECQ, which enable all-in-one quality evaluations of optical modules at speeds from 25 to 400 G. In addition, the MP2110A, thanks to its high-speed measurement and PAM4 analysis, will play a key role in improving optical module production-line productivity. Moreover, adding 53 Gbaud support for quality evaluation of next-generation optical modules helps cut capital equipment renewal costs.


Thursday, August 9, 2018

Teledyne LeCroy's Protocol Analyzer adds PAM4 50G-400G Ethernet

Teledyne LeCroy introduced a trace capture and analysis solution for the 802.3cd and 802.3bs 50/100/200/400GE four-level pulse amplitude modulation (PAM4) Ethernet specifications.

The new capability, which is available as a license for the company's SierraNet T328 protocol analyzer, enables higher data rates and enhanced reliability for future-generation data centers and cloud-based services.

Teledyne LeCroy notes that PAM4 signals are more susceptible to errors in noisy environments. To reduce the error rate, systems negotiate transmission parameters that maximize signal quality at the receiver. PAM4 Systems designers are demanding the link-layer analysis capabilities to ensure the negotiation among components is effective.

The SierraNet T328 can now help identify and reduce link-interoperability problems between major fabric components such as switches, routers, network interface adapters, servers, and Network Attached Storage (NAS).

"By providing real-time trace capture, decode, and analysis of the auto-negotiation and link-training functions, the SierraNet T328 has become the de facto standard for high-speed protocol analysis in development, debug, and test applications," stated David J. Rodgers, Ethernet and SAN Product Line Manager at Teledyne LeCroy.

Monday, July 30, 2018

TE Connectivity' next-gen connectors ready for 56G PAM4

TE Connectivity (TE) introduced its next-generation, 0.8mm free height board-to-board connectors designed for higher-speed, mezzanine board systems.

The company says its mezzanine connectors are capable of delivering 25 Gbps and higher signals for supporing PAM4 and PCIe Gen 5 architectures.

The new free height connectors are also said to deliver higher reliability through a stronger plug/receptacle mechanical design, maintaining the same performance when de-mated up to 0.5mm. In addition, modular tooling enables 1mm stack height increments and flexible pin counts.

Tuesday, May 29, 2018

Semtech announces PAM4 clock and data recovery platform

Semtech announced a PAM4 clock and data recovery (CDR) platform optimized for low power and low-cost PAM4 optical interconnects used in data center and active optical cable (AOC) applications.

Semtech's Tri-Edge is a new CDR platform technology being developed for the PAM4 communication protocol. It builds on the success of Semtech’s ClearEdge NRZ-based CDR platform technology and extends it to PAM4 signaling.

The company says its Tri-Edge CDR platform will be applicable for 100G, 200G and 400G requirements.

“The rapidly growing demand for bandwidth in the data center market requires a disruptive solution to meet the power, density and cost requirements. By combining leading-edge technologies with a focused application, we can enable a disruptive solution that we believe will meet the needs of the data centers in both the near-term and long-term,” said Imran Sherazi, Vice President of Marketing and Applications for Semtech’s Signal Integrity Products Group.

Semtech notes that its ClearEdge CDRs are the world’s most widely selected optical transceiver CDRs for use in 10G applications and 100G data center applications.


Monday, April 9, 2018

MediaTek announces 56G PAM4 SerDes

MediaTek announced a new 56G SerDes ASIC with PAM4 signaling and based on its 7nm FinFET process technology. The company said its high-performance DSP-based design demonstrates best-in-class power efficiency, performance and die-area. The first partner products adopting MediaTek's 56G PAM4 SerDes IP are already in development and will be available during the second-half of 2018.

MediaTek's SerDes portfolio now ranges from 10G, 28G, 56G through to 112G available for ASIC designs.

"The ASIC business has changed over time and we see new opportunities with IoT, communications and other consumer spaces that are demanding unique ASIC solutions. We have longstanding expertise in the ASIC side of the industry that goes along with our breadth of chipset portfolios in mobile, home and auto," said Jerry Yu, MediaTek Corporate Vice President and General Manager of the Intelligent Devices Business Group. "Our newest ASIC solution with silicon-proven IP available on 7nm and 16nm can be seamlessly integrated into these cutting edge ASIC products."