Showing posts with label Microsemi. Show all posts
Showing posts with label Microsemi. Show all posts

Wednesday, May 29, 2019

Microchip announces Terabit-Scale Ethernet PHY with MACsec

Microchip Technology introduced its META-DX1 family of Ethernet Physical-Layer (PHY) devices that integrates, onto a single chip, Ethernet ports from 1 Gigabit Ethernet (GbE) to 400 GbE, flexible Ethernet (FlexE), Media Access Control Security (MACsec) link encryption and nanosecond timestamping accuracy at terabit capacity.

The META-DX1, which was developed by Microchip's Microsemi division, enables line cards to quadruple in capacity – from 3.6 terabits per second (Tbps) to 14.4 Tbps with 36 ports of 400 GbE or 144 ports of 100 GbE – while supporting key features needed by service providers.


The META-DX1 family uniquely combines MACsec and FlexE into one solution. The META-DX1 MACsec engine secures traffic leaving the data center or enterprise premises, and FlexE enables both cloud and telecom service providers to meet capacity requirements while reducing fiber plant capital expenditures by optimally configuring links beyond today’s fixed-rate Ethernet so they can use low-cost, high-volume optics.

High-performance timestamping enables nanosecond-level accuracy on every port. This will support timing requirements of 5G mobile base stations.



The META-DX1 also brings a flexible crosspoint switching capability that makes it easier for OEMs to navigate the market transition from 25 Gbps NRZ and 56 Gbps PAM-based architectures by enabling them to support a single design or SKU for both 100 GbE (QSFP28) and 400 GbE (QSFP-DD) optics.

“The META-DX1 family was purpose-built to unify into a single hardware and software offering the broad range of capabilities service providers need in their network buildouts that connect enterprise and data center services to the cloud and emerging 5G applications,” said Babak Samimi, vice president for Microchip’s Communications business unit.  “By delivering the highest-density Ethernet ports coupled with MACsec, FlexE and the nanosecond packet timing performance needed for 5G, we’ve introduced an innovative Ethernet connectivity platform for telecom and cloud service provider routers and switches, as well as optical transport equipment.”

Initial META-DX1 family members will sample during Q3 2019.

https://www.microchip.com/
https://www.microsemi.com/META-DX1

Microsemi and Acacia collaborate on Flexible Rate Optical at up to 600G

Microsemi and Acacia Communications announced interoperability between Microchip’s DIGI-G5 Optical Transport Network (OTN) processor and Acacia’s AC1200 Coherent Module.

Microsemi's DIGI-G5 OTN processor supports FlexE and OTUCn protocols, enabling new terabit scale line cards with flexible rate optical interfaces for packet optical transport platforms. Acacia's AC1200 modules support for metro and data center interconnect networks. Specifically, while the DIGI-G5 processes client traffic into OTN, the 1.2T AC1200—powered by Acacia’s Pico digital signal processor (DSP) ASIC—on the line card will enable the OTN connections over two 600G tunable DWDM wavelengths with flexible transmission three-dimensional (3D) shaping features. These features, which include fractional quadrature amplitude modulation (QAM) and adaptive baud rate optimize transmission reach and capacity, approaching theoretical limits on a wide range of network configurations, in a power efficient manner.

The companies said their collaboration enables the first flexible rate system architectures with an established ecosystem to support the market’s transition to 200G, 400G, 600G and flexible rate OTN networks built with new Flexible Ethernet (FlexE) and OTUCn protocols. FlexE was designed to provide up to 30 percent greater bandwidth efficiency compared to traditional Ethernet link aggregation (LAG) with fewer limitations. Combining it with OTUCn and tunable fractional dense wavelength division multiplexing (DWDM) transmission brings service providers the potential to improve their OTN network capacity by up to 70 percent.

Thursday, January 24, 2019

Microsemi and Acacia collaborate on Flexible Rate Optical at up to 600G

Microsemi and Acacia Communications announced interoperability between Microchip’s DIGI-G5 Optical Transport Network (OTN) processor and Acacia’s AC1200 Coherent Module.


Microsemi's DIGI-G5 OTN processor supports FlexE and OTUCn protocols, enabling new terabit scale line cards with flexible rate optical interfaces for packet optical transport platforms. Acacia's AC1200 modules support for metro and data center interconnect networks. Specifically, while the DIGI-G5 processes client traffic into OTN, the 1.2T AC1200—powered by Acacia’s Pico digital signal processor (DSP) ASIC—on the line card will enable the OTN connections over two 600G tunable DWDM wavelengths with flexible transmission three-dimensional (3D) shaping features. These features, which include fractional quadrature amplitude modulation (QAM) and adaptive baud rate optimize transmission reach and capacity, approaching theoretical limits on a wide range of network configurations, in a power efficient manner.

The companies said their collaboration enables the first flexible rate system architectures with an established ecosystem to support the market’s transition to 200G, 400G, 600G and flexible rate OTN networks built with new Flexible Ethernet (FlexE) and OTUCn protocols. FlexE was designed to provide up to 30 percent greater bandwidth efficiency compared to traditional Ethernet link aggregation (LAG) with fewer limitations. Combining it with OTUCn and tunable fractional dense wavelength division multiplexing (DWDM) transmission brings service providers the potential to improve their OTN network capacity by up to 70 percent.

“DIGI-G5 allows our optical transport system partners to deliver terabit-class OTN switching line cards at 50 percent less power per port while enabling flexible rate ports and protocols up to 600G,” said Babak Samimi, vice president for Microchip’s Communications business unit. “Demonstrating interworking of the DIGI-G5 with Acacia’s AC1200 coherent module highlights that the ecosystem is ready to support the market transition to these new protocols, rates and multi-terabit architectures.”

“In addition to high capacity and density, our AC1200 module introduces several key features designed to enable network operators to optimize capacity, reach and spectral efficiency —making flexible transmission solutions up to 600G a reality,” said Benny Mikkelsen, Chief Technology Officer of Acacia Communications. “With Microchip’s DIGI-G5 scaling up capacity and reducing power at the same time, and the optical performance provided by our AC1200, we believe that Acacia and Microchip are helping to enable the market to scale network capacity with improved efficiency.”

ECOC 2018: Acacia presents 600 Gbps per Wavelength Coherent Transmission

At the European Conference on Optical Communications (ECOC) in Rome, Acacia Communications demonstrated its AC1200 coherent module with dual-core design enabling 1.2 Tbps error-free transmission over fiber with 600 Gbps per wavelength.

The Acacia AC1200 module supports transmission capacity of up to 1.2 Tbps in a footprint that is 40 percent less than the size of the 5” x 7” modules that support transmission speeds of 400 Gbps today.

The module is based on Acacia’s Pico DSP ASIC, which utilizes two wavelengths that can be configured to support from 100 Gbps to 600 Gbps capacity each. The Acacia AC1200 supports a suite of advanced three-dimensional (3D) shaping features that may be optimized to enable performance approaching theoretical limits on a wide range of network configurations.

Acacia shipped its first AC1200 module customer samples in March 2018 and anticipates production to begin by the end of 2018.

Acacia said its high-capacity solution targets the requirements for connections between large data centers with reaches of 100km and above using standard single-mode fiber.

 Microsemi's DIGI-G5 powers Terabit OTN switching cards
Microsemi introduced its DIGI-G5 Optical Transport Network (OTN) processor for terabit capacity OTN switching cards.

The company said this newest generation in its DIGI franchise enables packet-optical transport platforms to triple in capacity while slashing power consumption by 50 percent per port.

DIGI-G5 delivers 1.2 terabits per second (Tbps) of combined OTN and client interfaces and is first to market with newly standardized 25 Gigabit Ethernet (GE), 50GE, 200GE, 400GE, Flexible OTN (FlexO) and Flexible Ethernet (FlexE) with integrated security engine enabling flexible encrypted optical connections.

Transporting Ethernet, storage, intellectual property (IP)/ multiprotocol label switching (MPLS) and 4G/5G Common Public Radio Interface (CPRI)/eCPRI services over 100G OTN switched connections has proven to be the most fiber, power and cost-efficient deployment solution for moving bits in today's metro and long-haul networks.

“Our DIGI OTN processor portfolio has been instrumental in transforming service provider networks to mass deploy 100G OTN switched networks,” said Babak Samimi, vice president and business unit manager for Microsemi's Communications Business Unit. “Our DIGI-G5 breaks new ground by enabling the industry’s transition to new OTN 3.0 architectures at terabit scalability by delivering three times the port density while lowering power consumption by 50 percent per port.”

DIGI-G5 highlights

  • Total interface bandwidth of up to 1.2Tbps
  • Comprehensive Ethernet support: 10GE, 25GE, 50GE, 100GE, 200GE, 400GE and the new OIF FlexE specification
  • New OTN 3.0 rates, enabling flexible (FlexO) and fractional 100G+ (OTUCn, OTUCn-m) transmission
  • 56G PAM-4 Serializer/Deserializer (SerDes) allows direct connection to QSFP-DD, OSFP and coherent digital signal processors (DSPs)
  • Integrated packet test set enables remote troubleshooting and debug, driving down capital and operating expenditures
  • Integrated security engine enabling end-to-end AES-256 based encryption and authentication
  • Integrated G.HAO bandwidth-on-demand processing for OTN switching networks
  • Innovative DIGI-Mesh-Connect architecture which enables compact, pay-as-you-grow OTN switching at lowest cost and power by eliminating the need for a centralized switch fabric device.
  • Sampling is expected in Q2

Friday, August 3, 2018

Microsemi samples NVMe Gen 4 PCIe controller

Microsemi, which is now a wholly-owned subsidiary of Microchip Technology, introduced its Flashtec NVMe 3016 Gen 4 PCIe controller.

The device serves high-reliability, high-performance PCIe Gen 4 NVMe solid state drives (SSDs) and is capable of delivering greater than 8 GB per second throughput and more than 2 million IOPS.

It supports enterprise features going beyond the NVMe 1.3 protocol with the latest in security, encryption, virtualization and high availability support. Fast design of PCIe Gen 4 NVMe SSDs is enabled with Flashtec firmware development acceleration tools, including an architectural simulator to enable development and debug of firmware independent of silicon.

Microsemi notes triple level-cell (TLC) and quad level-cell (QLC) NAND technologies targeted at the high growth storage end point markets, such as data center, server and storage.

"We're excited to sample our new Flashtec NVMe 3016 controller to enable the next generation of high-performance PCIe Gen 4 NVMe SSDs," said Pete Hazen, vice president of Microsemi's Data Center Solutions business unit. "We're working closely with our customers to enable industry-leading solutions based on our highly flexible and programmable controller platform, and to accelerate time to market through our architectural and firmware development tools and support."

Sampling is underway.

Wednesday, June 13, 2018

Microsemi teams with China Telecom on optimized OTN for 5G

Microsemi is working with China Telecom Beijing Research Institute to define and develop next-generation optical transport solutions for 5G.

China Telecom is leading the Next-Generation Optical Transport Network Forum (NGOF) consortium formed to drive industry collaboration and technological innovations to define converged optical transport network (OTN) which meet the needs of 5G deployments. As part of this collaboration, Microsemi is bringing to market the DIGI-G5, the newest member of its DIGI OTN processors, supporting new 5G optimized architecture that enables the stringent synchronization, latency and network slicing requirements being placed on optical networks to support 5G deployments.

“China Telecom plans to be the pioneer in both 5G commercial service and 400G OTN network commercial deployments. A mobile-optimized converged metro, multiservice and cloud-based OTN transport network is critical to both initiatives,” said Zhang Chengliang, vice president, China Telecom Beijing Research Institute. “The availability of Microsemi’s DIGI-G5 will help the industry deliver a new generation of OTN equipment to enable the 5G era.”

Microsemi said its new 5G optimized architecture of the DIGI-G5 reduces the total latency for single hop close to 1 microsecond. In addition, the DIGI-G5 integrates close to two terabits of on-chip ODUk switching for hard traffic isolation and grooming in support of network slicing.

DIGI-G5 also delivers nanosecond level time stamping accuracy and provides mechanisms to carry critical timing information over the OTN network, ensuring that platforms will meet Precision Time Protocol’s (PTP’s) Class C requirements.

“As a market leader in OTN processors powering packet optical transport networks world-wide, we are focusing our investments to enable service providers to leverage economy of scale and realize operational efficiencies by extending OTN from their metro networks to the access as the packet optical topology for 5G transport,” said Babak Samimi, vice president and business unit manager for Microsemi's Communications business unit. “As a founding member of NGOF along with China Telecom, Microsemi is innovating and optimizing OTN for mobile applications and DIGI-G5 is bringing together the critical pieces like synchronization, latency, and network slicing needed for 5G.”

DIGI-G5 features supporting 5G:

  • New OTN 3.0 rates, enabling flexible (FlexO) and fractional 100G+ transmission
  • Comprehensive Ethernet support including 25GE, 50GE and 100Gbps
  • Close to 1 microsecond datapath latency
  • Supports hard traffic isolation and slicing over OTN
  • High precision nanosecond level IEEE 1588 PTP timestamping accuracy
  • Integrated G.HAO bandwidth-on-demand processing for OTN switching networks closer to the access

http://www.microsemi.com/digi-g5

About NGOF - http://ngof.net

Microsemi's DIGI-G5 powers Terabit OTN switching cards

Microsemi introduced its DIGI-G5 Optical Transport Network (OTN) processor for terabit capacity OTN switching cards.

The company said this newest generation in its DIGI franchise enables packet-optical transport platforms to triple in capacity while slashing power consumption by 50 percent per port.

DIGI-G5 delivers 1.2 terabits per second (Tbps) of combined OTN and client interfaces and is first to market with newly standardized 25 Gigabit Ethernet (GE), 50GE, 200GE, 400GE, Flexible OTN (FlexO) and Flexible Ethernet (FlexE) with integrated security engine enabling flexible encrypted optical connections.

Transporting Ethernet, storage, intellectual property (IP)/ multiprotocol label switching (MPLS) and 4G/5G Common Public Radio Interface (CPRI)/eCPRI services over 100G OTN switched connections has proven to be the most fiber, power and cost-efficient deployment solution for moving bits in today's metro and long-haul networks.

“Our DIGI OTN processor portfolio has been instrumental in transforming service provider networks to mass deploy 100G OTN switched networks,” said Babak Samimi, vice president and business unit manager for Microsemi's Communications Business Unit. “Our DIGI-G5 breaks new ground by enabling the industry’s transition to new OTN 3.0 architectures at terabit scalability by delivering three times the port density while lowering power consumption by 50 percent per port.”

DIGI-G5 highlights

  • Total interface bandwidth of up to 1.2Tbps
  • Comprehensive Ethernet support: 10GE, 25GE, 50GE, 100GE, 200GE, 400GE and the new OIF FlexE specification
  • New OTN 3.0 rates, enabling flexible (FlexO) and fractional 100G+ (OTUCn, OTUCn-m) transmission
  • 56G PAM-4 Serializer/Deserializer (SerDes) allows direct connection to QSFP-DD, OSFP and coherent digital signal processors (DSPs)
  • Integrated packet test set enables remote troubleshooting and debug, driving down capital and operating expenditures
  • Integrated security engine enabling end-to-end AES-256 based encryption and authentication
  • Integrated G.HAO bandwidth-on-demand processing for OTN switching networks
  • Innovative DIGI-Mesh-Connect architecture which enables compact, pay-as-you-grow OTN switching at lowest cost and power by eliminating the need for a centralized switch fabric device.
  • Sampling is expected in Q2

Thursday, April 5, 2018

Microsemi announces Cesium Atomic Clock certified for G.811.1

Microsemi announced that its portfolio of cesium clocks have now been to be compliant with the new G.811.1 recommendation (known as enhanced Primary Reference Clocks, or ePRC) from the International Telecommunication Union (ITU) for timing characteristics of enhanced primary reference clocks.

G.811.1 raises the bar for frequency accuracy by an order of magnitude from 1x10E-11 to 1x10E-12.

“As next-generation networks increasingly rely more on accurate time to achieve higher transport speeds and increased reliability, the pervasive use of GNSS technology as a time reference has become a major concern because of vulnerabilities to threats such as jamming and spoofing,” said Ramki Ramakrishnan, director of product management at Microsemi. “As a result, use of Cesium technology as the primary reference clock has become critical.”

Thursday, March 8, 2018

Microsemi's DIGI-G5 powers Terabit OTN switching cards

Microsemi introduced its DIGI-G5 Optical Transport Network (OTN) processor for terabit capacity OTN switching cards.

The company said this newest generation in its DIGI franchise enables packet-optical transport platforms to triple in capacity while slashing power consumption by 50 percent per port.

DIGI-G5 delivers 1.2 terabits per second (Tbps) of combined OTN and client interfaces and is first to market with newly standardized 25 Gigabit Ethernet (GE), 50GE, 200GE, 400GE, Flexible OTN (FlexO) and Flexible Ethernet (FlexE) with integrated security engine enabling flexible encrypted optical connections.

Transporting Ethernet, storage, intellectual property (IP)/ multiprotocol label switching (MPLS) and 4G/5G Common Public Radio Interface (CPRI)/eCPRI services over 100G OTN switched connections has proven to be the most fiber, power and cost-efficient deployment solution for moving bits in today's metro and long-haul networks.

“Our DIGI OTN processor portfolio has been instrumental in transforming service provider networks to mass deploy 100G OTN switched networks,” said Babak Samimi, vice president and business unit manager for Microsemi's Communications Business Unit. “Our DIGI-G5 breaks new ground by enabling the industry’s transition to new OTN 3.0 architectures at terabit scalability by delivering three times the port density while lowering power consumption by 50 percent per port.”

DIGI-G5 highlights

  • Total interface bandwidth of up to 1.2Tbps
  • Comprehensive Ethernet support: 10GE, 25GE, 50GE, 100GE, 200GE, 400GE and the new OIF FlexE specification
  • New OTN 3.0 rates, enabling flexible (FlexO) and fractional 100G+ (OTUCn, OTUCn-m) transmission
  • 56G PAM-4 Serializer/Deserializer (SerDes) allows direct connection to QSFP-DD, OSFP and coherent digital signal processors (DSPs)
  • Integrated packet test set enables remote troubleshooting and debug, driving down capital and operating expenditures
  • Integrated security engine enabling end-to-end AES-256 based encryption and authentication
  • Integrated G.HAO bandwidth-on-demand processing for OTN switching networks
  • Innovative DIGI-Mesh-Connect architecture which enables compact, pay-as-you-grow OTN switching at lowest cost and power by eliminating the need for a centralized switch fabric device.
  • Sampling is expected in Q2



Thursday, January 25, 2018

Microsemi's quarterly sales hit $468.7 million, up 7.6% yoy

Microsemi reported net sales for the first quarter of its fiscal year 2018, ended 31-Dec-2017, of $468.7 million, up 7.6 percent from the $435.5 million reported in the first quarter of 2017. GAAP gross margin for the first quarter of 2018 was 61.6 percent, inclusive of the effect of non-cash purchase accounting charges related to profit from acquired inventory of $5.2 million and $2.4 million in inventory charges related to the closure of a non-strategic operation. GAAP gross margin was 63.5 percent in the first quarter of 2017 and 64.0 percent in the fourth quarter of 2017. Non-GAAP gross margin for the first quarter of 2018 was 63.2 percent.

GAAP operating income and net income for the first quarter of 2018 were $59.5 million and $47.9 million, respectively, and included restructuring, facility closure and other related charges of $6.4 million and acquisition-related costs of $1.4 million. Non-GAAP operating income for the first quarter of 2018 was $150.8 million, up 13.6 percent from the $132.7 million reported in the first quarter of 2017.

"We kicked off the first quarter of fiscal 2018 with 8 percent year-over-year sales growth and 17 percent EPS growth," said James J. Peterson, Microsemi's chairman and CEO. "We are on a clear path to exceed our long-term 35 percent operating margin target as we leverage customer engagements, share gains and revenue growth into industry-leading profitability."

Wednesday, November 29, 2017

Microsemi acquires Vectron's timing business

Microsemi has acquired the high-performance timing business of Vectron International, a Knowles company, for $130 million, excluding working capital adjustments.

Vectron specializes in frequency control, sensor and hybrid solutions using the very latest techniques in both bulk acoustic wave (BAW) and surface acoustic wave (SAW)-based designs from DC to microwave frequencies. Products include crystals and crystal oscillators; frequency translators; clock and data recovery products; SAW filters; SAW oscillators; crystal filters; SAW and BAW based sensors and components used in telecommunications, data communications, frequency synthesizers, timing, navigation, military, aerospace, medical and instrumentation systems.

Friday, August 4, 2017

Microsemi unveils Switchtec PAX PCIe fabric switch

Microsemi, a major provider of semiconductor solutions, announced the availability of its new Switchtec PAX advanced fabric Gen3 PCIe switch, designed to provide high-performance fabric connectivity for scalable, multi-host systems and just a bunch of flash (JBOF) and supporting single root input/output (I/O) virtualisation (SR-IOV), NVMe and multi-function endpoints.

Microsemi noted that hyperconverged systems are shifting towards composable/disaggregated infrastructures (C/DI) such as rack scale architecture to meet the changing demands on resources and storage capacity of next-generation applications. PAX advanced fabric PCIe switches are designed to provide a scalable, low latency and cost-effective solution to the disaggregation of computing, networking, graphics processing units (GPUs) and storage resources.

The new PAX PCIe switches, which are flexibly interconnected with configurable high-speed fabric links, virtualise PCIe domains and SR-IOV endpoints. System development is simplified through a fabric application programming interface (API) and the ability to utilise off-the-shelf NVMe host drivers, reducing time-to-market for complex multi-host systems.

Microsemi's Switchtec PAX family features switches supporting from 96 lanes to 24 lanes and up to 48 ports, offering capabilities including:

1. PCIe fabric connectivity to address the limitations of the PCIe specification for rack scale multi-host systems.

2. Multi-host sharing of SR-IOV and multifunction endpoints.

3. Virtualisation of PCIe domains and SR-IOV NVMe SSDs, plus software development kit (SDK) for virtualisation of other SR-IOV endpoints and enclosure management.

4.  Flexible port bifurcation, enabling from x2 to x16 lanes per port.

5.  Advanced diagnostics and debug features to identify, diagnose and fix problems.

6.     Separate Refclk Independent SSC (SRIS) for cabled PCIe and lower cost system designs.

Microsemi's PCIe product portfolio includes the scalable, low power PFX family of PCIe Gen3 fanout switches, the programmable PSX family of PCIe Gen3 storage switches and the multi-protocol, adaptive EQNOX family of signal conditioners with FlexEQ equalisation technology supporting PCIe Gen3 and Gen2.

Thursday, July 20, 2017

Microsemi integrates Ethernet MAC to deliver FPGA 10 GBE

Microsemi, a provider of advanced semiconductor solutions, and Tamba Networks, a developer of connectivity intellectual property (IP) cores, have announced a collaboration through which they will incorporate Tamba Networks' Ethernet media access controller (MAC) into Microsemi's latest cost-optimised, mid-range PolarFire FPGA to offer a low power FPGA-based 10 Gigabit Ethernet solution.

Tamba Networks' Ethernet MAC is claimed to occupy half the area and to deliver twice the speed of competing Ethernet MACs, and can therefore offer Microsemi customers a lower cost solution based on its compact size combined with the security and advanced capabilities of PolarFire FPGAs.

As part of the collaboration with Tamba Networks, Microsemi has adopted the company's Interlaken and 10/40 Gigabit Ethernet MAC soft cores as key building blocks to evaluate and enhance PolarFire FPGAs' fabric architecture, with 10 and 40 Gbit/s datapaths running at 160 MHz and 320 MHz.

The Tamba Networks cores are designed to offer low gate count and latency along with flexibility. When combined with Microsemi's low power fabric and transceiver, the 10 Gigabit Ethernet soft core enables a 10 Gbit/s datapath that is claimed to offer 50% lower power consumption. Microsemi noted that the device is also available as a direct core from its IP library.

Microsemi stated that Tamba Networks was involved in the development of the PolarFire transceiver physical coding sublayer (PCS), providing the 64b66b/64b67b encoding modules used for Ethernet and Interlaken, and also helped modify the 64b66b encoder to operate with deterministic latency, providing support for common public radio interface (CPRI) options 7b, 8 and 9.

Microsemi's PolarFire FPGAs also target applications in the communications market, including access network, network edge, metro (1 to 40 Gbit/s), mobile infrastructure, wireless backhaul, smart optical modules and video broadcasting.


Microsemi noted that its PolarFire FPGAs are particularly suited to the access network infrastructure applications, where OEMs wish to deliver more bandwidth to customers while reducing costs.

Monday, June 12, 2017

Microsemi upgrades TimeProvider 5000 PTP grandmaster clock

Microsemi, a major provider of high performance, low power semiconductor solutions, has updated the hardware on its TimeProvider 5000 IEEE 1588 Precision Time Protocol (PTP) grandmaster clock to provide support for IPv6 and multi-Global Navigation Satellite System (GNSS) constellation, offering improved reception and higher security for a range of telecom network applications.

The company noted that global operators are increasingly seeking solutions such as its enhanced TimeProvider 5000 product to meet the requirement of directives in certain countries to support multiple constellations to remove the dependency on GPS. In addition, via support for both GLONASS and Galileo constellations systems can be made more robust and secure against certain GNSS vulnerabilities.

Microsemi stated that the TimeProvider product family has been installed in over 350 networks globally to support high performance, reliable network infrastructures. Combined with newly added support for IPv6 and multi-GNSS constellations, the TimeProvider 5000 also provides redundant hardware, user configurable PTP profiles and Synchronous Ethernet (SyncE) support with optical small form-factor pluggable (SFP) modules.
TimeProvider 5000 is a carrier-grade, IEEE1588 PTP grandmaster clock with network time protocol (NTP) server option and expansion shelf capabilities including SyncE and advanced PTP profiles, designed to meet the timing and synchronisation requirements of current and future networks. The device specifically enables circuit-to-packet network migration for advanced data services and wireless backhaul, as well as delivery of 3G, 4G/LTE, LTE-A and 5G wireless services.

Microsemi's enhanced TimeProvider 5000 PTP grandmaster clock with support for IPv6 and multi-GNSS constellation is available immediately.

Microsemi also offers a comprehensive range of IEEE 1588 and SyncE network synchronisation silicon solutions providing time stamping, ultra-low jitter suitable for up to 100 Gbit/s PHYs, IEEE 1588 protocol support (including the ITU-T telecom profile for frequency and phase), designed for wireless and wireline applications.


Wednesday, May 10, 2017

Microsemi and Aquantia introduce multi-rate Ethernet switch reference platform

Semiconductor solutions provider Microsemi and Aquantia, a supplier of high-speed Ethernet connectivity solutions for data centres, enterprise infrastructure and client connectivity, introduced a production-ready multi-rate switch reference platform optimised to support 24 x 2.5 Gbit/s and up to an additional four 2.5/5/10 Gbit/s BASE-T ports.

The solution, which is available immediately, combines Microsemi's SparX-IV Layer 2/3 enterprise switch, VSC7448, Linux SMBStaX software, clock management, PD69208M Power-over-Ethernet (PoE) power sourcing equipment (PSE) manager, and Aquantia's second generation multi-rate IEEE 802.3bz PHY, the AQR409.

Designed for applications including 1, 2.5 and 10 Gigabit Ethernet switching and aggregation, the joint reference design from Microsemi and Aquantia is suitable for enterprise infrastructure applications such as switches, access routers and WLAN access point (AP) switches.

Microsemi's VSC7448 SparX-IV-80 device is an 80 Gbit/s SMB/SME industrial Ethernet switch offering up to 52 ports supporting 1, 2.5 and 10 Gigabit Ethernet ports. Utilising multi-stage versatile content aware processing (VCAP), the solution delivers VLAN and QoS processing to enable the delivery of differentiated services, security via intelligent frame processing and egress frame manipulation. For industrial applications, VSC7448 integrates VeriTime timing technology.

The device also features a 500 MHz CPU that enables management of a Layer 2/3 Ethernet switch solution, and an API and software development package to aid development for managed Ethernet applications.

In addition, the PD69208M PoE PSE manager is designed to support IEEE 802.3bt for data rates up to 10 Gbit/s, while Microsemi clock management portfolio provides low jitter devices for clock synthesis, frequency conversion, jitter attenuation and fan out buffers.

Aquantia's AQrate AQR409 is an advanced low power, three-speed, quad-port PHY housed in a 19 x 19 mm flip-chip BGA package. AQrate technology is designed to bridge the bandwidth gap between legacy cabling infrastructure designed for 1 Gbit/s data rates and new 802.11ac WLAN technology offering higher bandwidth. The AQR409 can support 2.5/1 Gbit/s and 100 Mbit/s line rate over 100 metres of Cat 5e or Cat 6 cabling.

AQrate PHYs are compatible with the NBASE-T Alliance PHY specification and IEEE 802.3bz standard and perform physical layer functions required for transmission over 100 metres of twisted pair cabling. They also offer support for the IEEE 802.1AE MAC-layer security (MACsec) protocol and IEEE 1588 v2 PTP to synchronise real-time clocks to sub-microsecond accuracy,

Microsemi noted that the collaboration with Aquantia is part of its Accelerate Ecosystem, designed to speed time to market for end customers and development time for ecosystem participants.


Monday, April 10, 2017

Microsemi integrates Athena Cryptographic Processor into FPGAs

Microsemi and The Athena Group, a supplier of security, cryptography, anti-tamper and signal processing IP cores, announced that Athena's TeraFire cryptographic microprocessor has been integrated into Microsemi's recently introduced PolarFire FPGA 'S class' family.

Athena's TeraFire cryptographic microprocessor technology is designed to address cybersecurity requirements for a range of industries via support for the most commonly used cryptographic algorithms, including those certified for military/government use by the U.S. NIST's Suite B, as well as those recommended in the U.S. Commercial National Security Algorithm (CNSA) suite. TeraFire also supports algorithms and key sizes commonly used in Internet communications protocols, such as TLS, IPSec, MACSec and KeySec.

Microsemi's secure, cost-optimised PolarFire FPGAs offer low power consumption at mid-range densities with 12.7 Gbit/s SerDes transceivers, as well as high reliability, and target applications including wireline access networks and cellular infrastructure, smart connected factory, functional safety and secure communications.

PolarFire FPGAs' transceivers also offer support for multiple serial protocols, making them suitable for communications applications with 10 Gigabit Ethernet, CPRI, JESD204B, Interlaken and PCIe. In addition, the ability to implement serial gigabit Ethernet (SGMII) on general purpose input/output (GPIO) enables multiple 1 Gigabit Ethernet links to be supported.

Microsemi noted that the TeraFire cryptographic microprocessor enables a significant improvement in built-in cryptographic capabilities compared to SRAM-based FPGAs and has been adopted by both defence and commercial customers as a result of its flexibility and efficiency.

Athena's TeraFire cryptographic microprocessors can operation at up to 200 MHz. The TeraFire core provides advanced countermeasures against side-channel analysis (SCA) techniques such as DPA and differential electro-magnetic analysis (DEMA) that could otherwise be used to extract secret keys from the device, with supported algorithms that use a secret or private key offered with countermeasures against SCA.

Microsemi's PolarFire 'S class' FPGAs equipped with Athena TeraFire cryptographic microprocessor are scheduled to be available by the end of the second quarter of 2017.

https://www.microsemi.com/

Thursday, April 6, 2017

ECI selects Microsemi as Primary OTN Provider

Microsemi, a provider of semiconductor solutions, announced that ECI has appointed the company as its primary OTN solutions provider, and recently selected the DIGI-G4 fourth generation products for its Apollo family of packet optical transport platforms.

Microsemi's DIGI OTN processors are designed to enable ECI to leverage a single software development model to address diverse end market hardware configurations, helping to reduce R&D costs and speed product development.

Microsemi noted that despite the rapid adoption of packet services, client services are often at rates of 10 Gbit/s and below, requiring OTN switching to make the wide deployment of 100 Gbit/s optical connectivity cost-effective. In addition, cloud service providers require high capacity, low latency connectivity between geographically distributed data centres. ECI's Apollo solution uses Microsemi's DIGI OTN processors to address these challenges and meet a range of market requirements.

The DIGI offering enables ECI to deliver solutions including: high-density 100/400 Gbit/s capacity client and line-side cards for P-OTPs; multi-terabit OTN and packet/MPLS switching platforms; fabric-less switching platforms for metro networks; 100 Gbit/s transponders and muxponders; and wavelength and sub-wavelength level encryption solutions.

Microsemi's DIGI family of OTN processors have been implemented in service provider and hyperscale data centre WANs worldwide, with the DIGI-G4 designed to address the needs of 400 Gbit/s designs while consuming a claimed 50% of the power per 100 Gbit/s port of other solutions. DIGI-G4 can also support encrypted 100 Gbit/s OTN connections for a new generation of software-defined networking (SDN)-ready solutions.

The Microsemi OTN processors also provide the capacity, security and flexibility required for line cards within packet optical transport platforms (P-OTPs), ROADM/WDM and data centre interconnect (DCI) platforms. Combined with a field-hardened SDK, the integrated DIGI solution provides a common hardware and software platform for multi-terabit OTN packet optical equipment.

Microsemi claims that the common software architecture for DIGI OTN processors allows OEMs to reduce the development cost for multiple 100 and 400 Gbit/s hardware platforms by over 25%.

Further key features of the DIGI-G4 solution include: single-chip 4 x 100 Gbit/s solution for OTN switched line cards; 100 Gbit/s gearbox for connection to CFP2/4 and QSFP28 transceivers; high density 10/40/100 Gbit/s multi-service support, including Ethernet, IP/MPLS and SONET/SDH; 25 Gbit/s granularity framer to DSP interface enabling line rates to match programmable modulation capabilities in coherent DSPs; multi-chip Interlaken interconnect for compact chassis DCI applications; OTN-SDK with adapter layer software.

https://www.microsemi.com/\

Thursday, September 29, 2016

Microsemi Intros Network Synchronization Phase-locked Loops

Microsemi introduced a new family of network synchronization phase-locked loops (PLLs) for Synchronous Ethernet (SyncE), IEEE 1588 and optical transport network (OTN).

The company said its new miTimePLL new products have one third the jitter and half the footprint of current devices, which, in combination with the company's new miTimePLL technology, is specifically designed to address the demands of phase alignment performance required by networks such as wireless infrastructure.

Microsemi's ZL307xx and ZL306xx family of network synchronization PLLs offers 180 femtoseconds (fs) typical jitter, ensuring a single chip, small footprint, low cost synchronization solution for 10GbE to 100GbE applications. These devices come with new features vital for network applications requiring phase alignment, including any-to-any frequency, better than 2 ns input/output (I/O) alignment, embedded 1 pulse per second (ePPS), time of day (ToD) registers, reference/synchronization inputs, and full monitoring and hitless reference switching between GPS/SyncE/1588. Microsemi's ePPS is already providing a simple solution for chassis systems with limited backplane pins by combining phase into a high speed clock, thereby using a single pin, where before two were required.

"Microsemi has a long history in IEEE 1588 PLL devices dating back to 2008 with our first product introduction, and our 1588 solutions are widely used within tier 1 telecommunications equipment vendors. We continue to invest strongly to drive our technologies forward, meeting new challenges to stay ahead of the competition with ultra-low jitter on our new miTimePLL devices—providing a highly integrated, cost-effective solution for our customers," said Maamoun Seido, vice president and business unit manager of Microsemi's timing products. "Customers can remain confident in our capabilities, as these products enable them to handle phase alignment seamlessly within their equipment with a smaller footprint and attractive price point."

http://www.microsemi.com

Saturday, February 27, 2016

Microsemi Targets 400G Metro Optical with DIGI-G4 OTN Processor

Microsemi announced  mass production of its DIGI-G4, its latest DIGI Optical Transport Network (OTN) processor enabling the transition to 400G OTN switching solutions in metro transport networks.

Microsemi's DIGI-G4 enables network equipment vendors to double the 100G OTN port density on their optical transport systems, while achieving a 50 percent reduction in power per 100G port.

Some highlights:

  • Industry's first single-chip 4x100G solution for OTN switched line cards
  • Integrated 100G gearbox for direct connect to CFP2, CFP4 and QSFP28 transceivers
  • Industry's highest density 10G, 40G and 100G multi-service support, including Ethernet, storage, IP/MPLS and SONET/SDH
  • Industry's first sub-wavelength OTN encryption solution to secure the cloud
  • Industry's first 25G granularity flexible framer to DSP interface providing scalable line-rates to match the programmable modulation capabilities found in next-generation coherent DSPs
  • Multi-chip Interlaken interconnect solutions for scalable compact chassis data center interconnect applications
  • High performance OTN-SDK with adapter layer software accelerates customer time-to-market


"We have been working very closely with some of the world's leading original equipment manufacturers to complete Carrier qualification of their 400G OTN designs," said Babak Samimi, vice president and business unit manager of Microsemi, Communications business unit. "This year we will see our DIGI-G4 deployed in networks worldwide as the key technology for driving the transition to 400G OTN switching, in addition to enabling a new wave of flexible optical transport infrastructure that is software-defined networking (SDN)-ready and delivers on the security needs being demanded for cloud-connectivity powered by our embedded encryption engine."

http://www.microsemi.com/applications/communications

  • In January 2016, Microsemi completed its acquisition of PMC-Sierra in a deal valued at approximately $2.5 billion.

PMC's DIGI-G4 Processor Scales OTN Line Card Capacity by 4X

PMC-Sierra has commenced sampling of its new DIGI-G4 chip -- the industry's highest density 4x100G OTN processor and featuring 50 percent less power per port than the previous generation.

The DIGI-G4 OTN processor, which builds on the success of PMC’s DIGI-120G, enabling the transition to 400G line cards in packet optical transport platforms (P-OTP), ROADM/WDM and optimized data center interconnect platforms for OTN switched metro networks. It increases 10G, 40G and 100G line card port density by 4X with flexible client mapping of Ethernet, storage, IP/MPLS and SONET/SDH, while reducing power by 50 percent per port. DIGI-G4 builds on the IP from DIGI-120G, enabling customers to maintain their rich feature set and software investment, which reduces time to market by up to six months and lowers development costs.

Significantly, DIGI-G4 delivers multi-rate, sub-180ns latency OTN encryption, allowing cloud and communications service providers to ensure security without compromising performance. DIGI-G4 supports sub-wavelength OTN encryption and is compatible with OTN switched networks. PMC said these these capabilities, combined with the densest 10G/40G/100G Ethernet ports, enables a new class of low-power, high-capacity transport platforms optimized specifically for the hyperscale data center WAN interconnect market (see whitepaper).

Tuesday, November 24, 2015

Microsemi and PMC Agree on Acquisition

Microsemi Corporation and PMC-Sierra entered into a definitive agreement under which Microsemi will acquire PMC for $9.22 in cash and 0.0771 of a share of Microsemi common stock for each share of PMC common stock through an exchange offer. The transaction is valued at approximately $2.5 billion and represents a 77.4 percent percent premium to the closing price of PMC's stock as of Sept. 30, 2015.

"We are pleased PMC has accepted our compelling strategic offer, which clearly benefits shareholders of both Microsemi and PMC. We can now shift our focus to realizing the significant synergies identified during our comprehensive analysis," said James J. Peterson, Microsemi's chairman and CEO. "As we have previously stated, this acquisition will provide Microsemi with a leading position in high performance and scalable storage solutions, while also adding a complementary portfolio of high-value communications products."

The transaction is expected to be immediately accretive to Microsemi's non-GAAP EPS and free cash flow. Microsemi anticipates achieving more than $100 million in annual cost synergies with greater than $75 million of those expected to be realized in the first full quarter of combined operations. Microsemi currently estimates approximately $0.60 of non-GAAP EPS accretion in the first full year after closing the transaction.

Terms of the agreement were approved by the boards of directors of both Microsemi and PMC.

http://www.microsemi.com

Wednesday, November 18, 2015

Microsemi Revises Offer to Acquire PMC

Microsemi increased its proposal to acquire PMC-Sierra to $9.22 in cash and 0.0771x of a share of Microsemi common stock for each share of PMC common stock. The implied enterprise value is $2.3 billion, net of PMC's net cash balance as of Sept. 27, 2015. Based on the closing stock price of Microsemi on Nov. 17, 2015, the transaction is valued at $12.05 per PMC share.

"The board of PMC chose not to recommend to their shareholders our previous proposal, which was $0.17 per share higher than the existing offer from Skyworks," said James J. Peterson, Microsemi's chairman and CEO. "Our revised offer delivers even more value to shareholders and we have addressed PMC's preference in increasing the cash component of our proposal. Because we are not subject to the same uncertainty regarding regulatory approvals, our unique ability to close this transaction represents the best approach to realizing the value of PMC in a timely manner, consistent with the board's fiduciary responsibility to its shareholders."

http://www.microsemi.com


Microsemi Expands Clock Management Solutions

Microsemi introduced three new products in its portfolio of clock management solutions: ZL30244 and ZL30245 , two dual-channel any-to-any clock multiplier and frequency synthesizer integrated circuits (ICs), and ZL30255 , a dual-channel any-to-any clock multiplier and jitter attenuator. Target applications for the devices include access networks, storage area networks, data center infrastructure, enterprise infrastructure, and video broadcast equipment.

"Our three new clock management solutions build upon the success of Microsemi's single-channel versions, ZL30250/251 and ZL30253, further expanding product capabilities for our customers to reduce design complexity and lower bill of material costs," said Maamoun Seido, vice president and business unit manager of Microsemi's timing products. "Providing the second channel in these devices further simplifies and reduces the cost of designs. For clock trees that require multiple frequency families, the ZL30244, ZL30245 and ZL30255 provide lower chip count and lower cost solutions—all with exceptional jitter performance."

http://www.microsemi.com

Friday, October 30, 2015

Microsemi Sweetens Offer to Acquire PMC-Sierra

Microsemi increased its offer to acquire PMC-Sierra.  Under the new proposal, PMC shareholders would receive $9.04 in cash and 0.0771x of a Microsemi common share for each PMC common share held at the close of the transaction. The implied enterprise value is $2.3 billion, net of PMC's net cash balance as of Sept. 27, 2015. Based on the closing stock price of Microsemi on Oct. 29, 2015, the transaction is valued at $11.88 per PMC share.

"Our revised proposal offers superior value to PMC's shareholders, and Microsemi is uniquely positioned to realize significant synergies," said James J. Peterson, Microsemi's chairman and CEO. "Our offer is more strategic, offers more certainty in terms of closing approval process and timing, and at a higher price than the Skyworks proposal. Shareholders receive cash now as well as the opportunity to participate in the significant upside potential of a global analog and mixed-signal leader with a highly diversified platform for growth and profitability."

http://www.microsemi.com


Microsemi Announces Bid to Acquire PMC-Sierra


Microsemi announced an offer to acquire PMC-Sierra for $11.50 per PMC share, representing a premium of approximately 50 percent to the closing price on Oct. 5, 2015, the last trading day prior to the announcement of PMC's proposed acquisition with Skyworks Solutions.  The offer price is based on the closing stock price of Microsemi on Oct. 16, 2015. Microsemi said its offer is better than that of Skyworks because its cash and stock proposal...

Skyworks to Acquire PMC-Sierra for $2 Billion


Skyworks Solutions has agreed to acquire PMC-Sierra for $10.50 per share in an all-cash transaction valued at approximately $2 billion. Skyworks, which is based in  Woburn, Massachusetts, supplies high performance analog semiconductors for automotive, broadband, wireless infrastructure, energy management, GPS, industrial, medical, military, wireless networking, smartphone, and tablet applications. The company’s portfolio includes amplifiers,...


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