Showing posts with label Intel. Show all posts
Showing posts with label Intel. Show all posts

Wednesday, May 11, 2022

Intel's Project Amber promises to be a trust authority for edge and cloud

Intel introduced Project Amber, an independent trust authority in the form of an innovative service-based security implementation.

Intel said the foundational basis of trust in a confidential computing environment is established via a process called attestation. The verification of this trustworthiness is a critical requirement for customers to protect their data and intellectual property as they move sensitive workloads to the cloud. Project Amber is the first step in creating a new multi-cloud, multi-TEE service for third-party attestation:

  • Designed to be cloud-agnostic, this service will support confidential computing workloads in the public cloud, within private/hybrid cloud and at the edge. Interposing a third party to provide attestation helps provide objectivity and independence to enhance confidential computing assurance to users.
  • In its first version, Project Amber intends to support confidential compute workloads deployed as bare metal containers, virtual machines (VMs) and containers running in virtual machines using Intel TEEs. The initial release will support Intel TEEs, with plans to extend coverage to platforms, devices and other TEEs in the future.
  • Intel is also working with independent software vendors (ISVs) to enable trust services that include Project Amber. New software tools, such as published APIs that enable ISVs to incorporate Project Amber to augment software and services, will complement Intel’s platforms and technologies, and bring more value to customers and partners.

Intel plans to launch a customer pilot of Project Amber in the second half of 2022, followed by general availability in the first half of 2023.

“As organizations continue to capitalize on the value of the cloud, security has never been more top of mind. Trust goes hand in hand with security, and it is what our customers expect and require when delivering on Intel technology,” said Greg Lavender, chief technology officer, senior vice president and general manager of the Software and Advanced Technology Group at Intel. “With the introduction of Project Amber, Intel is taking confidential computing to the next level in our commitment to a zero-trust approach to attestation and the verification of compute assets at the network, edge and in the cloud.”

https://www.intel.com/content/www/us/en/newsroom/news/vision-2022-project-amber-security.html

Tuesday, May 10, 2022

Intel unveils IPU roadmap with ASIC and FPGA designs

Intel unveiled its IPU roadmap extending through 2026, featuring new FPGA + Intel architecture platforms (code-named Hot Springs Canyon) and the Mount Morgan (MMG) ASIC, as well as next-generation 800GB products. The discussion also a look at Intel's open-source software foundation, including the infrastructure programmer development kit (IPDK), which builds upon SPDK, DPDK and P4.

In terms of the timeline, Intel's roadmap includes:

  • 2022: Mount Evans, the company's first ASIC IPU; and Oak Springs Canyon, Intel’s second-generation FPGA IPU shipping to Google and other service providers.
  • 2023/24: introduction of 400 Gbps IPUs, code-named Mount Morgan and Hot Springs Canyon,
  • 2025/26: introduction of 800 Gbps IPUs

Here are some details on the 200 Gbps and 400 Gbps IPUs:

Mount Evans -- the code name for Intel’s first ASIC IPU, architected and developed with Google Cloud

  • Hyperscale-ready, it offers high-performance network and storage virtualization offload while maintaining a high degree of control.
  • Provides a programmable packet processing engine enabling use cases like firewalls and virtual routing.
  • Implements a hardware accelerated NVM storage interface scaled up from Intel Optane technology to emulate NVMe devices.
  • Deploys advanced crypto and compression acceleration, leveraging high- performance Intel Quick Assist technology.
  • Can be programmed using commonly deployed, existing, software environments, including DPDK, SPDK; the pipeline can be configured utilizing P4 programming.
  • Shipping is expected to begin in 2022 to Google and other service providers; broad deployment is expected in 2023.

Oak Springs Canyon -- the code name for Intel’s 2nd generation FPGA-based IPU platform built with the Intel Xeon D and the Intel Agilex FPGA, the industry’s leading FPGA in power, efficiency, and performance.

  • Network virtualization function offload for workloads like open virtual switch (OVS) and storage functions like NVMe over fabric and RoCE v2
  • Standard yet customizable platform that enables customers to customize their data path and their solutions with FPGA and Intel Xeon-D with software like Intel Open FPGA Stack, a scalable, source-accessible software and hardware infrastructure
  • Programmable using commonly deployed existing software environments, including DPDK and SPDK, which have been optimized on x86.
  • A more secure, high speed 2x 100 gigabit Ethernet network interface with the hardened crypto block
  • VirtIO support in Hardware for Native Linux support

Mount Morgan -- a next-generation ASIC IPU expected in 2023/2024.

Hot Springs Canyon -- a next-generation FPGA-based IPU platform expected in 2023/2024.

https://www.intel.com/content/www/us/en/newsroom/home.html

Intel demos Xeon + Tofino switch + Mount Evans IPU

As part of the Intel Innovation event this week, Intel demonstrated an Intelligent Fabric based on its Xeon Scalable processors and next-generation Xeon D processors, Tofino 3 programmable switching silicon and new "Mount Evans" infrastructure processing unit (IPU). The idea is to leverage P4 programming across all 3 processing platforms for use cases such as near real-time telemetry and analytics with the Intel Deep Insight Network Analytics...

Google collaborates on Intel's ASIC-based infrastructure processor

Intel and Google Cloud announced a deep collaboration to develop an ASIC P4-programmable infrastructure processing unit (IPU).Code-named “Mount Evans,” this open solution supports open source standards, including an infrastructure programmer development kit (IPDK) to simplify developer access to the technology in Google Cloud data centers. Machine learning, large-scale data processing and analytics, media processing, and high-performance computing...

Intel rolls FPGA-based Infrastructure Processing Unit (IPU)

Intel outlined its vision for the infrastructure processing unit (IPU), a programmable network device that intelligently manages system-level infrastructure resources by securely accelerating those functions in a data center.In a video, Guido Appenzeller, chief technology officer with Intel's Data Platforms Group says the idea is to cleanly separate the processing of client workloads from workloads of the cloud service provider.Intel cites several...

Wednesday, April 13, 2022

Intel commits to Net-Zero emissions in global operations by 2040

Intel pledged to achieve net-zero greenhouse gas emissions in its global operations by 2040, to increase the energy efficiency and lower the carbon footprint of Intel products and platforms with specific goals, and to work with customers and industry partners to create solutions that lower the greenhouse gas footprint of the entire technology ecosystem.

To realize this ambitious goal, Intel has set the following interim milestones for 2030:

  • Achieve 100% renewable electricity use across its global operations.
  • Invest approximately $300 million in energy conservation at its facilities to achieve 4 billion cumulative kilowatt hours of energy savings.
  • Build new factories and facilities to meet U.S. Green Building Council LEED program standards, including recently announced investments in the U.S., Europe and Asia.
  • Launch a cross-industry R&D initiative to identify greener chemicals with lower global warming potential and to develop new abatement equipment.

“The impact of climate change is an urgent global threat. Protecting our planet demands immediate action and fresh thinking about how the world operates. As one of the world's leading semiconductor design and manufacturing companies, Intel is in a unique position to make a difference not only in our own operations, but in a way that makes it easier for customers, partners and our whole value chain to take meaningful action too,” states Pat Gelsinger, Intel chief executive officer.


https://www.intc.com/news-events/press-releases/detail/1539/intel-commits-to-net-zero-greenhouse-gas-emissions-in-its


Monday, April 11, 2022

Intel acquires the Open Networking Foundation's team

The Open Networking Foundation (ONF), which was established in 2011 with a mission of transforming networking by championing software-defined networking (SDN), disaggregation and open source, has released all of its projects to open source with permissive software licenses as it transitions away from code development by an internal team. To this end, ONF has open sourced the entirety of its portfolio of production-ready platforms, including solutions for public 5G (SD-Core, SD-RAN), private 5G networks (Aether), software-defined broadband (SEBA/VOLTHA) and P4 programmable networks (SD-Fabric, PINS).

As part of the announcement, it was disclosed that Intel has acquired the Open Networking Foundation's (ONF’s) development team and Ananki, the independent venture-backed company that was recently spun out of the ONF to deliver open source-based Software-Defined Private 5G as a commercial service. Financial terms were not disclosed.

The ONF Executive Director, Guru Parulkar has joined Intel as VP of its Network and Edge Group under Nick McKeown, founding ONF board member and Senior Vice President and General Manager of the Network and Edge Group at Intel. In addition, the majority of ONF’s internal development team will transition to be employed by Intel.

Timon Sloane will lead the ONF as General Manager, and new Area Governance Boards will be formed to steer the major project areas as ONF transitions into a more classic open source organization.

“ONF has made important contributions to the industry with its software-defined development projects, and I am confident that its move to a community-sourced model as part of its next stage of growth will fuel further contributions as the industry and its needs advance,” said Nick McKeown, founding ONF board member and Senior Vice President and General Manager of the Network and Edge Group at Intel. “As a result of ONF’s shift in direction, we are pleased to welcome ONF’s development team to Intel. We look forward to our continued contributions to ONF projects, the ongoing success of ONF-developed platforms, and our active participation in the ONF community.”

“ONF’s journey has been transformational,” said Guru Parulkar, VP Intel NEX and Board Member, ONF. “In collaboration with our partners, our small amazing team has challenged the status quo and ignited the SDN movement. We have built platforms that naysayers said were doomed to fail, we’ve proven what’s possible, and today a number of our platforms have been deployed in production networks and others are now production ready and expected to be broadly adopted. I’m exceptionally proud of our team and of the work we have accomplished to date - but our work is not done. Today we are simply shifting to a new model optimized for the next phase of our transformative journey towards open networking. While ONF’s engineering team is moving to Intel, the work of ONF proceeds unabated, and I’m more bullish than ever that its impact will continue to grow.”

https://opennetworking.org/news-and-events/press-releases/onf-enters-a-new-era-focused-on-growing-adoption-and-community-for-its-leading-open-source-projects/

ONF spins out Ananki, a start-up focused on private 5G

The Open Networking Foundation (ONF) launched Ananki, an independent venture-backed company to deliver open source-based Software-Defined Private 5G as a commercial service to address enterprises’ unique requirements of Industry 4.0. The ambition is to enable enterprise private 5G that is hardened and optimized for industrial applications, yet as easy to consume as Wi-Fi.

Ananki’s technological foundation is ONF’s open source Aether, SD-RAN, SD-Fabric and SD-Core projects. The company will offer a private 5G solution delivered as a SaaS. 



Key attributes:

  • Optimized 5G+ Experience - Software-defined, automated, AI powered, application optimized connectivity, with enhanced security enabled by a programmable data plane 
  • Cloud First - pre-integrated with hyperscaler cloud and edge, delivering private 5G as a SaaS service, creating a continuously improving experience running on any multi-cloud platform
  • Industry 4.0 Ready - Empowering developers to build transformative IoT, IIoT and OT solutions with rich APIs

“ONF continues to innovate in ways that magnify the power of open systems and open source across our industry. The ONF board recognizes that the lack of support for open source initiatives from commercial companies remains an inhibiting factor for scaled adoption. To meet this challenge, we have agreed to spin out Ananki as an independent company to pursue commercialization of Aether with a view that this will help accelerate the adoption and impact of open source,” states Andre Fuetsch, ONF Board Chair and AT&T CTO.

Guru Parulkar, Executive Director ONF and CEO of Ananki, comments: “Ananki is broadening the impact of the ONF’s work, and will help ONF’s Aether become much more broadly adopted.  By providing a commercially supported option for consuming Aether, many more organizations will be able to easily and economically leverage the benefits of Private 5G for building Industry 4.0 solutions.  And in turn, Ananki is committed to contributing back to the ONF open source, helping to advance the Aether platform and broaden the ONF community.”

https://ananki.io/

http://www.opennetworking.org

 ONF's Aether Edge Cloud selected for DARPA's Pronto Project

The Open Networking Foundation's Aether 5G Connected Edge Cloud platform is being used as the software platform for Pronto, a project backed by $30 million in DARPA funding to develop secure 5G network infrastructure. Specifically, DARPA is funding ONF to build, deploy and operate the network to support research by Cornell, Princeton and Stanford universities in the areas of network verification and closed-loop control. 

Aether (pronounced ‘ee-ther’) provides mobile connectivity and edge cloud services for distributed enterprise networks, all provisioned and managed from a centralized cloud. ONF will enhance and deploy its open source Aether software platform as the foundation for the Pronto research work, and in turn the research results will be open sourced back into Aether to help advance Aether as a platform for future secure 5G network infrastructure.

One of Pronto's goals is "to leverage network programmability to enable deep and wide network visibility, verification, and closed-loop control, giving programmers tools to build and dynamically deploy customized network functionality in a secure and reliable manner."


ONF also confirmed that it is now running a beta production deployment of Aether.  This deployment is a single unified cloud managed network interconnecting the project’s commercial partners AT&T, Ciena, Intel, Google, NTT, ONF and Telefonica. This initial deployment supports CBRS and/or 4G/LTE radio access at all sites, and is cloud managed from a shared core running in the Google public cloud.

The University campuses are being added to this Aether deployment in support of Pronto. Campus sites will be used by Pronto researchers to advance the Pronto research, serving as both a development platform and a testbed for use case experimentation. The Aether footprint is expected to grow on the university campuses as Aether’s 5G Connected Edge Cloud capabilities are leveraged both for research on additional use cases as well as for select campus operations.

https://prontoproject.org/

https://opennetworking.org/

ONF's Aether targets Enterprise 5G/LTE-Edge-Cloud-as-a-Service

The Open Networking Foundation (ONF) announced Aether – the first open-source platform for delivering Enterprise 5G/LTE-Edge-Cloud-as-a-Service.

Aether (pronounced ‘ee-ther’) provides mobile connectivity and edge cloud services for distributed enterprise networks, all provisioned and managed from a centralized cloud.


Aether leverages existing work from ONF including the CORD and ONOS platforms. It can be run in a Kubernetes environment, and it simultaneously supports deployment on licensed (4G/5G) and unlicensed (CBRS) spectrum.

Thursday, March 31, 2022

Intel to acquire real-time continuous optimization software

Intel agreed to acquire Granulate Cloud Solutions Ltd., an Israel-based developer of real-time continuous optimization software. Financial terms were not disclosed.

Granulate’s autonomous optimization service helps reduce CPU utilization and application latencies. It does this by learning the customer’s application and deploying a customized set of continuous optimizations at runtime. This enables deployment on smaller compute clusters and instance types to improve application performance and drive down cloud and data center costs. Granulate’s service does not require developer intervention nor does it require the customer to make changes to its own code. Optimizations for the latest CPUs can be applied even on legacy Linux distributions and runtimes.

Intel said the acquisition of Granulate will help cloud and data center customers maximize compute workload performance and reduce infrastructure and cloud costs. Deal terms are not being disclosed.

“Today’s cloud and data center customers demand scalable, high-performance software to make the most of their hardware deployments,” said Sandra Rivera, executive vice president and general manager of the Datacenter and AI Group at Intel. “Granulate’s cutting-edge autonomous optimization software can be applied to production workloads without requiring the customer to make changes to its code, driving optimized hardware and software value for every cloud and data center customer.”

Greg Lavender, chief technology officer, senior vice president and general manager of the Software and Advanced Technology Group at Intel, said: “We are building our portfolio of software optimization tools that offer flexible and scalable capabilities that allow us to meet the growing demand of the ubiquitous compute era. Granulate’s innovative approach to real-time optimization software complements Intel’s existing capabilities by helping customers realize performance gains, cloud cost reductions and continual workload learning.”

http://www.intel.com

Thursday, March 24, 2022

Intel and Microsoft contribute Scalable I/O Virtualization spec to OCP

 Intel and Microsoft have contributed a Scalable I/O Virtualization (SIOV) specification to the Open Compute Project (OCP), enabling virtualization of PCI Express and Compute Express Link devices in cloud servers. 

SIOV is hardware-assisted I/O virtualization with the potential to support thousands of virtualized workloads per server. SIOV moves the non-performance-critical virtualization and management logic off the PCIe device and into the virtualization stack. It also uses a new scalable identifier on the device, called the PCIe Process Address Space ID, to address the workloads’ memory.

SIOV technology is supported in the upcoming Intel Xeon® Scalable processor, code-named Sapphire Rapids, as well as Intel Ethernet 800-series network controllers and future PCIe and Compute Express Link (CXL) devices and accelerators. Linux kernel upstreaming is underway with anticipated integration later in 2022.

“Microsoft has long collaborated with silicon partners on standards as system architecture and ecosystems evolve. The Scalable I/O Virtualization specification represents the latest of our hardware open standards contributions together with Intel, such as PCI Express, Compute Express Link and UEFI,” said Zaid Kahn, GM for Cloud and AI Advanced Architectures at Microsoft. “Through this collaboration with Intel and OCP, we hope to promote wide adoption of SIOV among silicon vendors, device vendors, and IP providers, and we welcome the opportunity to collaborate more broadly across the ecosystem to evolve this standard as cloud infrastructure requirements grow and change.”

The first I/O virtualization specification, Single-Root I/O Virtualization (SR-IOV), was released more than a decade ago and conceived for the virtualized environments of that era, generally fewer than 20 virtualized workloads per server.

https://www.intel.com/content/www/us/en/newsroom/opinion/new-specification-hyperscale-virtualization.html

https://www.opencompute.org/

Intel updates power supply specs for PCIe 5.0

Intel has published updated ATX 3.0 power supply specifications for next-generation hardware and upcoming components built for technologies like PCIe Gen 5.0.  

The initial ATX 2.0 specs were introduced in 2003. 

Intel said a new 12VHPWR connector will power most, if not all, future PCIe 5.0 desktop Add-in cards (e.g., graphics cards). This new connector provides up to 600 watts directly to any PCIe 5.0 Add-in/graphics card. It also includes sideband signals that will allow the power supply to communicate the power limit it can provide to any PCIe 5.0 graphic card.

New guidelines reflect the PCIe CEM Gen 5 power excursion limit for PCIe 5.0 add-in cards that was published in November 2021. Updated specifications include new DC output voltage regulation that will be necessary for managing new power excursion requirements.

Intel has also revised its ATX12VO spec to provide an updated blueprint for designing power supply units (PSUs) and motherboards that reduce power draw at idle

“Power supplies based on ATX 3.0 and ATX12VO 2.0 will ensure anyone looking to get the most stable and cost optimized performance possible with highest power efficiency out of their desktop PCs will be able to do so – both now and in the future,”states Stephen Eastman, Intel platform power specialist.

https://www.intel.com/content/www/us/en/newsroom/news/intel-introduces-new-atx-psu-specifications.html

Tuesday, March 15, 2022

Intel picks Germany for its next European fab

Intel announced plans to invest an initial 17 billion euros into a leading-edge semiconductor fab mega-site in Magdeburg, Germany, the capital of Saxony-Anhalt.  Construction is expected to begin in the first half of 2023 and production planned to come online in 2027.

The new facility will use Intel’s most advanced, Angstrom-era transistor technologies, serving the needs of both foundry customers and Intel for Europe and globally as part of the company’s IDM (integrated device manufacturer) 2.0 strategy.

Intel also plans to create a new R&D and design hub in France, and to invest in R&D, manufacturing and foundry services in Ireland, Italy, Poland and Spain. 

Intel is also continuing to invest in its Leixlip, Ireland, expansion project, spending an additional 12 billion euros and doubling the manufacturing space to bring Intel 4 process technology to Europe and expand foundry services. Once complete, this expansion will bring Intel’s total investment in Ireland to more than 30 billion euros.

In addition, Intel and Italy have entered into negotiations to enable a state-of-the-art back-end manufacturing facility. With a potential investment of up to 4.5 billion euros, this factory would create approximately 1,500 Intel jobs plus an additional 3,500 jobs across suppliers and partners, with operations to start between 2025 and 2027.

Pat Gelsinger, CEO of Intel, said: “Our planned investments are a major step both for Intel and for Europe. The EU Chips Act will empower private companies and governments to work together to drastically advance Europe’s position in the semiconductor sector. This broad initiative will boost Europe’s R&D innovation and bring leading-edge manufacturing to the region for the benefit of our customers and partners around the world. We are committed to playing an essential role in shaping Europe’s digital future for decades to come.”

Thursday, February 24, 2022

AT&T and Intel co-develop advanced RAN pooling

AT&T is collaborating with Intel on an Advanced  base station distributed unit (DU) pooling technology designed to deliver unprecedented levels of elasticity in the RAN. 

AT&T says DU pooling provides the greatest value in C-RAN or Centralized RAN network deployments where RAN baseband equipment from many cell sites are “pooled together” into a “cloud” of general purpose processors in far edge data centers or central offices. Furthermore, through an advanced form of DU pooling called Class II pooling, a single 5G radio can now distribute the baseband processing for each user device in the cell across multiple servers.

DU pooling technology was made possible by combining AT&T’s Open RAN technologies as one of the co-founders of the O-RAN Alliance with Intel’s expertise in general purpose processors and software-based RAN through its FlexRAN software stack running on Intel 3rd generation Intel Xeon Scalable processors. The open standards for communications between radios and DUs that were published by O-RAN enabled its development, and the result is a technology demonstrator implemented on FlexRAN software.


https://about.att.com/innovationblog/2022/cloudifying-5g-with-elastic-ran.html

Tuesday, February 15, 2022

Intel to acquire Tower Semi, expanding its foundry footprint

Intel agreed to acquire Tower Semiconductor for $53 per share in cash, representing a total enterprise value of approximately $5.4 billion. 

Tower Semiconductor, which is based in Migdal Haemek, Israel, offers expertise is in specialty technologies, such as radio frequency (RF), power, silicon-germanium (SiGe) and industrial sensors, extensive IP and electronic design automation (EDA) partnerships, and an established foundry footprint. It operates seven manufacturing facilities: Fab 1 and Fab 2 (150mm and 200mm) in Israel, Fab 3 and Fab 9 (200mm) in Newport Beach, California and in San Antonio, Texas and three additional fabs (two 200mm and one 300mm) in Japan via a partnership with  Nuvoton Technology Corporation Japan. Tower is also sharing a 300mm manufacturing facility being established in Italy with ST Microelectronics. Altogher, Tower offers more than 2 million wafer starts per year of capacity. Tower also has a silicon photonics foundry.

“Tower’s specialty technology portfolio, geographic reach, deep customer relationships and services-first operations will help scale Intel’s foundry services and advance our goal of becoming a major provider of foundry capacity globally,” said Pat Gelsinger, Intel CEO. “This deal will enable Intel to offer a compelling breadth of leading-edge nodes and differentiated specialty technologies on mature nodes – unlocking new opportunities for existing and future customers in an era of unprecedented demand for semiconductors.”

https://www.intc.com/news-events/press-releases/detail/1527/intel-to-acquire-tower-semiconductor-for-5-4-billion

Intel Foundry Services makes a splash: $1B fund, Arm & RISC-V support, Open Chiplet Platform 

by James E. CarrollThe newly established Intel Foundry Services (IFS) announced several initiatives to accelerate its entrance into the semiconductor fabrication market: a $1 billion investment fund, support for Arm and RISC-V in addition to x86, and pioneering work with chiplet architecture based on 3D packaging technology.The new $1 billion investment fund has three aims:Equity investments in disruptive startups.Strategic investments to accelerate...


MaxLinear develops 5G Open RAN platform on Intel Agilex FPGA

 MaxLinear announced a new reference design for next-generation 5G infrastructure Radio Units (RUs) that combines Intel's high performance and low power Agilex FPGA family with MaxLinear RF transceivers and MaxLIN ultra-wideband digital predistortion (DPD) solution.

Highlights:

  • Intel's Agilex SoC FPGA devices use heterogeneous 3D system-in-package (SiP) technology to integrate Intel's first FPGA fabric built on 10 nm SuperFin Technology. Leveraging this advanced process technology and 2nd Gen Intel Hyper-flex FPGA Architecture enables these FPGAs to deliver ~2X better fabric performance per watt when compared to competitive 7 nm FPGA portfolios. Agilex SoC FPGAs offer an integrated quad-core Arm Cortex-A53 processor and a custom logic migration path from FPGA to structured eASIC for cost and power benefits in the high-volume production.
  • Intel's O-RAN, Fronthaul, and Low-PHY is a complete set of building blocks required to implement an O-RAN Alliance Split 7.2x compliant O-RU fronthaul interface in an Agilex FPGA. Intel also offers FlexRAN software stack, an O-RAN compliant Split 7.2x software covering High-PHY functionality for O-DU running on Intel Xeon processors.
  • MaxLinear's high-performance RF transceiver portfolio supports up to 400MHz instantaneous bandwidth (IBW) and includes the MxL16xx Quad-RF and MxL155x Octal-RF families. These transceivers are software compatible, creating a single platform solution that customers can leverage for radio applications, including macro, massive MIMO, and small cell.
  • MaxLinear's MaxLIN uses advanced machine learning algorithms to exceed the 3GPP and FCC  unwanted emissions requirements with margin while delivering high PA efficiencies of >50%. This capability dramatically reduces power consumption for an 8-transceiver macro implementation by >10% compared with competitive DPD offerings.

“The Open RAN ecosystem will immediately benefit from our cooperation with industry leader Intel. Our RU reference platforms, featuring Intel Agilex FPGAs, will provide the most flexible programmable solution with the highest system performance available on the market for global Open RAN radio use cases,” said Brendan Walsh, vice president of MaxLinear’s Wireless Infrastructure Group. “These high efficiency reference solutions will dramatically reduce the power consumed by 5G radio systems while simultaneously maximizing network performance."

“MaxLinear’s RF transceivers together with Intel FPGAs and IP deliver 2x performance per watt versus competing FPGAs and can offer a leading portfolio of radio solutions to our wireless systems customers allowing them to speed up time to market,” said Mike Fitton, vice president and general manager of the Intel Programmable Solutions Group's Network Business Division. “This is another strong example of industry collaboration – reducing time and complexity, while dramatically accelerating delivery of advanced 5G solutions.”

http://www.maxlinear.com

Monday, February 7, 2022

IFS makes a splash: $1B fund, Arm & RISC-V support, Open Chiplet Platform

by James E. Carroll

The newly established Intel Foundry Services (IFS) announced several initiatives to accelerate its entrance into the semiconductor fabrication market: a $1 billion investment fund, support for Arm and RISC-V in addition to x86, and pioneering work with chiplet architecture based on 3D packaging technology.

The new $1 billion investment fund has three aims:

  • Equity investments in disruptive startups.
  • Strategic investments to accelerate partner scale-up.
  • Ecosystem investments to develop disruptive capabilities supporting IFS customers.

IFS confirmed that it will support multiple instruction set architectures (ISAs), spanning x86, Arm and RISC-V, making it the only foundry to offer IP optimized for all three of the industry’s leading ISAs.

The company sees strong demand from foundry customers for RISC-V and, to this end, Intel is planning investments and offerings for RISC-V. Partners in the RISC-V ecosystem include Andes Technology, Esperanto Technologies, SiFive and Ventana Micro Systems. IFS plans to offer a range of validated RISC-V IP cores, performance-optimized for different market segments. IFS will optimize IP for Intel process technologies to ensure that RISC-V runs best on IFS silicon across all types of cores, from embedded to high-performance. Three types of RISC-V offerings will be made available:

  • Partner products manufactured on IFS technologies.
  • RISC-V cores licensed as differentiated IP.
  • Chiplet building blocks based on RISC-V, leveraging advanced packaging and high-speed chip-to-chip interfaces.

IFS also plans to sponsor an open-source RISC-V software development platform and s joining RISC-V International, a global nonprofit organization supporting the free and open RISC-V instruction set architecture and extensions.

IFS is making a major push into system-on-package architectures with an Open Chiplet Platform designed to leverage advanced 3D packaging technologies. The idea is to partition complex semiconductors into modular blocks or “chiplets.” Each block is customized for a particular function, providing designers incredible flexibility to mix and match the best IP and process technologies for the product application. Intel believes the data center market will be one of the first to adopt modular architectures. Closely integrating accelerator chiplets in the same package as a data center CPU enables significantly higher performance and reduced power compared to placing accelerator cards near CPU boards. The Open Chiplet Platform is being developed with leading cloud service providers.  Intel is also partnering to develop an open standard for a die-to-die interconnect that allows chiplets to communicate with each other at high speeds. 

In addition,  Intel Foundry Services (IFS) today launched an Accelerator ecosystem to to spur collaboration with electronic design automation (EDA), intellectual property (IP) and design services. The IFS Accelerator provides a comprehensive suite of tools for customers:

The most powerful and validated EDA solutions optimized for Intel’s leadership technology and manufacturing, covering the full spectrum from concept to high-volume silicon production.

A comprehensive, silicon-verified, and Intel process-specific IP portfolio, including standard cell libraries, embedded memories, general purpose I/Os, analog IP and interface IP.

Design services partners that allow customers to focus on creating unique product ideas, assigning implementation tasks to rigorously trained designers well-versed on Intel technology.

The IFS Accelerator includes 17 founding partner companie as well as a broad library of IP offerings from a range of partners.

EDA Alliance: Ansys, Cadence, Siemens EDA, Synopsys 

IP Alliance: Alphawave, Analog Bits, Andes, Arm, Cadence, eMemory, M31, SiFive, Silicon Creations, Synopsys, Vidatronic 

Design Services Alliance: Capgemini, Tech Mahindra, Wipro

“Intel is an innovation powerhouse, but we know that not all good ideas originate from within our four walls,” said Randhir Thakur, president of Intel Foundry Services. “Innovation thrives in open and collaborative environments. This $1 billion fund in partnership with Intel Capital – a recognized leader in venture capital investing – will marshal the full resources of Intel to drive innovation in the foundry ecosystem.”

“Foundry customers are rapidly embracing a modular design approach to differentiate their products and accelerate time to market. Intel Foundry Services is well-positioned to lead this major industry inflection. With our new investment fund and open chiplet platform, we can help drive the ecosystem to develop disruptive technologies across the full spectrum of chip architectures,” said Pat Gelsinger, Intel CEO.

Saf Yeboah, senior vice president and chief strategy officer at Intel, said: “Intel Capital’s history and expertise are rooted in chips. Over the last 30 years, we have invested over $5 billion into 120 companies supporting the semiconductor manufacturing ecosystem, from the materials coming out of the ground to the software tools used to implement a design. Our investments, which range from pathfinding bets into early-stage companies to deeply strategic and collaborative investments, drive innovation across architecture, IP, materials, equipment and design.”

Intel expands its manufacturing plans

Intel will invest more than $20 billion in the construction of two new fabs in Ohio. The initial phase of the project is expected to create 3,000 Intel jobs and 7,000 construction jobs over the course of the build. Air Products, Applied Materials, LAM Research and Ultra Clean Technology will establish a physical presence in the region. Initial production is targetted for 2025.

Today’s investment marks another significant way Intel is leading the effort to restore U.S. semiconductor manufacturing leadership,” said Pat Gelsinger, CEO of Intel. “Intel’s actions will help build a more resilient supply chain and ensure reliable access to advanced semiconductors for years to come. Intel is bringing leading capability and capacity back to the United States to strengthen the global semiconductor industry.

In a press conference, Gelsinger said the new facilities will produced advanced chip designs at 2nm and below.

“The impact of this mega-site investment will be profound,” said Keyvan Esfarjani, Intel senior vice president of Manufacturing, Supply Chain and Operations. “A semiconductor factory is not like other factories. Building this semiconductor mega-site is akin to building a small city, which brings forth a vibrant community of supporting services and suppliers. Ohio is an ideal location for Intel’s U.S. expansion because of its access to top talent, robust existing infrastructure, and long history as a manufacturing powerhouse. The scope and pace of Intel’s expansion in Ohio, however, will depend heavily on funding from the CHIPS Act.”

https://www.intel.com/content/www/us/en/newsroom/resources/global-manufacturing.html#gs.mt8qf9

Intel breaks ground on $20 billion fabs in AZ

Intel broke ground on two new fabs (52 and 62) at the company’s Ocotillo campus in Chandler, Arizona. When fully operational in 2024, the new fabs will manufacture Intel’s most advanced process technologies, including Intel 20A featuring the new RibbonFET and PowerVia innovations. The capacity is expected to be used for Intel's own products as well as for customers of the newly formed Intel Foundry Services.“Today’s celebration marks an important...




Wednesday, February 2, 2022

Intel's Project Circuit Breaker aims to weed out design flaws

Intel announced Project Circuit Breaker, a program to build a community of elite hackers to hunt bugs in firmware, hypervisors, GPUs, and chipsets. 

Project Circuit Breaker builds on Intel’s existing open Bug Bounty program by hosting targeted time-boxed events on specific new platforms and technologies, providing training and creating opportunities for more hands-on collaboration with Intel engineers. 

Project Circuit Breaker’s first event, Camping with Tigers, is already underway with a group of 20 researchers who received systems with Intel Core i7 processors (formerly “Tiger Lake”).

https://www.projectcircuitbreaker.com

  • Intel’s bug bounty awards range from $500 up to $100,000.

Wednesday, January 26, 2022

Intel sees record quarter for its Data Center Group

Citing an all-time record quarter for its Data Center Group (DCG), with strong server recovery in enterprise and government, Intel reported Q4 2022 GAAP revenue of $20.5 billion, exceeding October guidance by $1.3 billion and up 3 percent yoy. Q4 EPS amounted to $1.13, exceeding October guidance by 35 cents.

Full-year GAAP revenue set an all-time Intel record of $79.0 billion, up 1 percent YoY.

Pat Gelsinger, Intel's CEO, states: "We had a record quarter for DCG, where we grew 20% year-over-year and where we continue to be the partner of choice for cloud and data center customers. We expect that our Xeon shipments in December alone exceeded the total server CPU shipments by any single competitor for all of 2021." 




https://www.intc.com/financial-info/financial-results

Sunday, January 23, 2022

Intel expands its manufacturing plans

Intel will invest more than $20 billion in the construction of two new fabs in Ohio. The initial phase of the project is expected to create 3,000 Intel jobs and 7,000 construction jobs over the course of the build. Air Products, Applied Materials, LAM Research and Ultra Clean Technology will establish a physical presence in the region. Initial production is targetted for 2025.

Today’s investment marks another significant way Intel is leading the effort to restore U.S. semiconductor manufacturing leadership,” said Pat Gelsinger, CEO of Intel. “Intel’s actions will help build a more resilient supply chain and ensure reliable access to advanced semiconductors for years to come. Intel is bringing leading capability and capacity back to the United States to strengthen the global semiconductor industry.

In a press conference, Gelsinger said the new facilities will produced advanced chip designs at 2nm and below.

“The impact of this mega-site investment will be profound,” said Keyvan Esfarjani, Intel senior vice president of Manufacturing, Supply Chain and Operations. “A semiconductor factory is not like other factories. Building this semiconductor mega-site is akin to building a small city, which brings forth a vibrant community of supporting services and suppliers. Ohio is an ideal location for Intel’s U.S. expansion because of its access to top talent, robust existing infrastructure, and long history as a manufacturing powerhouse. The scope and pace of Intel’s expansion in Ohio, however, will depend heavily on funding from the CHIPS Act.”

https://www.intel.com/content/www/us/en/newsroom/resources/global-manufacturing.html#gs.mt8qf9

Intel breaks ground on $20 billion fabs in AZ

Intel broke ground on two new fabs (52 and 62) at the company’s Ocotillo campus in Chandler, Arizona. When fully operational in 2024, the new fabs will manufacture Intel’s most advanced process technologies, including Intel 20A featuring the new RibbonFET and PowerVia innovations. The capacity is expected to be used for Intel's own products as well as for customers of the newly formed Intel Foundry Services.“Today’s celebration marks an important...

TSMC to invest $12 billion in 5nm fab in Arizona

TSMC confirmed plans to build and operate an advanced semiconductor fab in Arizona -- its secend manufacturing site in the United States. The company already operates a fab in Camas, Washington and design centers in Austin and San Jose. The new facility in Arizona represents a $12 billion investment. It will utilize TSMC’s 5-nanometer technology for semiconductor wafer fabrication, have a 20,000 semiconductor wafer per month capacity. TSMC said...


GlobalFoundries plans new $1 billion fab expansion in New York

GlobalFoundries (GF) announced its expansion plans for its most advanced manufacturing facility in upstate New York.GF will invest $1 billion to immediately add an additional 150,000 wafers per year within its existing Fab 8 to help address the global chip shortage. Following that, GF plans to construct a new fab that will create more than 1,000 new high-tech jobs. GF recently announced new fab in Singapore and $1 billion planned investment...

Samsung ramps up automotive memory chips for EVs

Samsung Electronics unveiled a portfolio of automotive memory solutions designed for next-generation autonomous electric vehicles. The new lineup includes a 256-gigabyte (GB) PCIe Gen3 NVMe ball grid array (BGA) SSD, 2GB GDDR6 DRAM and 2GB DDR4 DRAM for high-performance infotainment systems, as well as 2GB GDDR6 DRAM and 128GB Universal Flash Storage (UFS) for autonomous driving systems.The need for high-capacity, high-performance SSDs and graphics...