Showing posts with label Cavium. Show all posts
Showing posts with label Cavium. Show all posts

Tuesday, June 7, 2011

Cavium Boosts Per-Core Frequency of OCTEON Processor

Cavium Networks has boosted its OCTEON II CN63XX 2 to 6-core MIPS64 processors with up to 10.8GHz of 64 bit processing with each CPU core running at up to 1.8GHz to customers worldwide.



This new 1.8GHz operating frequency more than doubles the CPU core frequency available relative to the previous generation of OCTEON Plus processors.



The higher per-core frequency allows Cavium to address new markets including higher-end control plane, and integrated control and data plane applications that require high single-threaded software performance.

http://www.caviumnetworks.com

Sunday, June 5, 2011

AppliedMicro Embeds Trusted Module Security into PacketPro

Applied Micro Circuits Corporation (AppliedMicro) introduced its latest PacketPro Gen2 embedded processor featuring an embedded "SLIMpro" Trusted Management Module (TMM) that enables network equipment manufacturers to hard wired, tamper-proof encryption and authentication capabilities into their devices.



The Trusted Management Module resides in a secure on-chip cryptographic boundary region designed to replace multi-chip solutions which are vulnerable to attack. AppliedMicro said its SLIMpro TMM not only hides cryptographic keys, passwords and digital certifications, but also makes its possible to include a Secure Boot capability in networking gear. The embedded TMM decrypts and authenticates software used during reboots, or to decrypt and authenticate secure firmware updates or new software images. This effectively prevented "cloned" equipment appearing in the network, or unauthorized software patches and reboots of networking equipment under attack by hackers.



The new "Keelback" APM86791 PacketPro Gen2 embedded processor features a single-core, 1.0-GHz PowerPC 465 processor with floating point unit, 32KB L1 I-cache, 32KB D-cache and 256 KB L2 cache with hardware I/O coherency and DDR3 memory controller with optional ECC. The Trusted Management Module is part of a set of advanced features enabled by SLIMpro in AppliedMicro's PacketPro Gen 2 family. Other features available through SLIMpro include intelligent power management, asymmetric multiprocessing, queue and traffic management, and offload acceleration features. The APM86791 has four 10/100/1000 Ethernet ports (RGMII & SGMII), two PCI-Express Gen1/2 ports, two USB 2.0 hosts with integrated PHY/Serdes and one SATA 2.0 port.



"With network connectivity becoming even more pervasive, mainstream, embedded systems are faced with security threats ranging from intellectual property theft and network intrusions to system hacking," said Majid Bemanian, senior director of marketing for AppliedMicro. "AppliedMicro offers a customizable approach with its Trusted Management Module as a tamper-proof hardware platform that is impervious to software and hardware attacks, providing developers with the most advanced security for embedded systems."



Samples of AppliedMicro APM86791 are expected in the third quarter. http://www.apm.com

Monday, April 4, 2011

Vitesse and AppliedMicro Collaborate on 40G/100G Enhanced FEC

Vitesse Semiconductor and AppliedMicro announced an alliance to drive a standard approach for 40G and 100G Enhanced Forward Error Correction (eFEC) technology. The collaboration allows AppliedMicro to license Vitesse's patented portfolio of 40G and 100G hard decision eFEC cores for its FPGA and ASSP solutions aimed at emerging Optical Transport Network (OTN) applications requiring best-in-class net electrical coding gain (NECG) with the lowest implementation complexity and cost. The two companies will mutually cross license three OTN applications including AppliedMicro's 10GE LAN Signal Mapping to OTU2 Signal patent and Vitesse's Continuously Interleaved Error Correction patent.



Forward Error Correction is widely used in fiber optic communications to reduce bit error rate in typically noisy signal environments. As metro and long-haul networks transition from 10G to 40G, and up to 100G high speed data rates, the challenges in developing cost-effective, improved signal-to-noise ratio solutions become more substantial.



"Providing the industry a standardized eFEC approach for emerging OTN solutions in metro and long-haul networks is our ultimate goal," said Steve Perna, vice president of product marketing at Vitesse. "This effort provides significant technology advancements and value to customers who need an effective and reliable way to transmit data, voice, and video at faster rates in OTN applications. As networks migrate and Ethernet becomes the ubiquitous protocol, this capability will be increasingly critical."

"We are pleased to work with Vitesse to drive a standard eFEC approach for 40G and 100G data rates," said George Jones, vice president of marketing and business development at AppliedMicro. "The combination of AppliedMicro and Vitesse supporting this family of eFEC cores in the marketplace addresses the challenges of time-to-market and interoperability. AppliedMicro's roadmap of SoftSilicon® solutions enables immediate implementation of these eFEC cores for customer designs. Our complementary ASSP solutions will utilize the same cores and provide both software and hardware investment protection for our customers."http://www.vitesse.com http://www.apm.com

Wednesday, March 30, 2011

AppliedMicro Enhances its Multi-core PacketPro Processors

AppliedMicro announced the availability of "Diamondback" APM86392 and APM86391, the newest members of its PacketPro™ family of multi-core embedded processing devices. The new processors feature an asymmetric multiprocessing (AMP) capability that enables two or more independent subsystems to operate concurrently with effective isolation on a single chip.



AppliedMicro said this feature improves application performance and provides an easier migration to multicore designs with greater flexibility for a wide range of embedded applications in networking, storage, printing, imaging, and multimedia access systems.



Traditional multi-core processors force software engineers to dedicate one of the cores as a master to control the operations of the other slave cores. By harnessing innovative features of the PacketPro family enabled by AppliedMicro's Scalable Lightweight Intelligent Management processor (SLIMpro) subsystem, developers can implement AMP on APM8639x processors without dedicating one of the cores as a master. This enables completely separate and isolated partitions on a single chip, each with independent operating systems, applications, software, processing bandwidth, I/O and cache. Each subsystem is decoupled from other subsystems during software updates, crashes, rebooting, peak performance demands or other events that can interrupt continuous operations.



"In instances of a system fail requiring complete reboot, the PacketPro allows the decoupling of cores without interruption or impact of other subsystems running on the same embedded SoC device," said Jim Johnston, Senior Director of Marketing at AppliedMicro. "Before this, both subsystems would have to be taken down to reboot one operating system due to dependencies from shared cache memory and other resources. AppliedMicro's approach provides each processor with separate and virtualized access to processor resources that one subsystem can continue operation even if any of the other ones becomes inoperative."http://www.apm.com/products/process.html

Sunday, March 6, 2011

Applied Micro Sees Inflection Point in OTN Market

Applied Micro Circuits Corp. has shipped 1 million 10G Optical Transport Network (OTN) ports and the company believes the technology has reached an inflection point for the industry. Shipments of AppliedMicro System-on-Chip ports to manufacturers of optical switch and routing equipment has risen by more than 50 percent over the last two years.



"OTN market adoption has reached a critical tipping point since it was first proposed a decade ago as a replacement for SONET/SDH technology in long-haul networks," said Francesco Caggioni, Senior Director of Strategic Marketing for AppliedMicro. "We see the trend accelerating as all of our Tier-1 customers anticipate further OTN deployments to transport the exploding volume of Internet traffic over cost-effective, high-speed optical networks. We've seen our market share increase as carriers and network system manufacturers transform the Internet infrastructure to accommodate the ever-growing demand for datacenter, enterprise, video and mobile traffic."



AppliedMicro is one of the early pioneers of OTN and first started shipping ports for this market in 2004 with its Rubicon family of products. Since then, AppliedMicro's Yahara, Pemaquid, PQx and the recently introduced 100Gbps OTN transponder and muxponder solutions have provided Tier-1 customers with increased levels of integration for the continued expansion of network capacity and switching speeds.
http://www.apm.com

  • In December 2010, AppliedMicro introduced a 100G Muxponder (multiplexing transponder) solution for Optical Transport Networks (OTN) featuring an integrated framer/mapper PHY and the company's "SoftSilicon" flexibility . The 100G Muxponder can multiplex any combination of 10G and 40G client signals into a 100G OTN signal (OTU4).


  • In November, AppliedMicro introduced a family of 100 Gbps optical network processors for the Packet-Optical Transport System (P-OTS) and IP-over-DWDM transport markets. Leveraging SoftSilicon programmable technology developed by TPack, the new devices support the recently-adopted 100GE (IEEE ) and OTU4 (ITU-T) interface standards. The first two new devices in the family, TPOT414 and TPOT424, are 100G transponders for metro/core OTN and packet networks. The devices interface directly to CFP or MSA-168 type optical modules for standalone transponder applications or for line cards in larger systems. AppliedMicro said its SoftSilicon technology enables the same device to be configured to run as an 100GE-OTU4 transponder or as an OTU4-OTU4 transponder. The soft approach also enables flexibility as specs are updated.

  • Earlier in 2010, AppliedMicro acquired TPACK A/S, a developer of programmable chip solutions for packet transport networks, for $32 million in cash plus up to $5 million in cash earn-outs depending on performance milestones over the next eighteen months. TPACK, which is based in Copenhagen, Denmark, developed a "SOFTSILICON" solution implemented in Altera FPGA devices. The SOFTSILICON products are used in 10, 40 and 100 Gbps OTN switching and routing network equipment.

Wednesday, February 16, 2011

Netronome Forms Partnerships with McAfee, VSS, Qosmos

Netronome has completed compatibility testing in the McAfee Security Innovation Alliance (SIA) program to become a Technology Partner. Under the McAfee SIA program, Netronome SSL Inspector appliances have demonstrated interoperability with McAfee Network Security Platform devices. The Netronome SSL Inspector appliances provide line-rate decryption of encrypted traffic, and the joint solution with McAfee leverages this capability to detect and protect against threats hidden within encrypted traffic.



In addition, Netronome is partnering with VSS Monitoring to provide interoperable solutions for the real-time examination of traffic encrypted with SSL.. Network administrators will be able to use their existing analytical tools to inspect SSL packets in real time at 10 Gbps throughout large distributed enterprise and carrier-class networks. The solutions are built around VSS Distributed Traffic Capture Systems that provide real-time access for the high-performance Netronome SSL Inspector appliance.



Netronome has also formed a partnership with Qosmos, which specializes in Network Intelligence (NI) technology. The joint solution can scale deep packet inspection (DPI) from 1 Gbps to 100 Gbps while simultaneously offering a rich detection set for thousands of applications and protocols. The integrated solution is designed for manufacturers of security applications.http://www.netronome.com http://www.vssmonitoring.com

Netronome Boosts its Network Flow Processor with 40G, 10G Copper Interfaces

Netronome has added 10GBASE-T and 40GBASE-SR4 Ethernet interfaces for use with its family of PCIe network acceleration cards and production-ready network processing platforms.



Netronome supplies Network Flow Processors that are designed for tight coupling with embedded multicore Intel and x86 processors. This accelerates network, security and content processing platforms used in 40 Gbps and 100 Gbps networks. It is the only line of processors backward compatible with the market‐leading Intel IXP28XX. Netronome's heterogeneous multicore processing architecture provides independent layers of workload-optimized packet, flow, security and application processing to dramatically increase network performance. Simultaneously, it frees IA/x86 resources to provide more application and control plane processing. Because the platform is based on standard Intel-based CPUs, developers of Linux-based network and security applications can significantly reduce development time and costs.



Netronome's new 10GBASE-T and 40GBASE-SR4 interface modules include fully integrated network bypass support, reducing the need for costly external hardware.



Netronome's NFP-3240 network flow processors can be used in the 1U and 2U platforms that offer up to 200 Gbps of L2-L7 network and security application performance with sub-50 microsecond latency for security applications.



"Netronome pioneered flow processing and is committed to providing our customers the silicon, hardware, software and building blocks to securely process flows at the speeds required for next generation platforms," said Jarrod Siket, senior vice president of sales and marketing at Netronome. "The new accelerated 40 Gbps and copper 10 Gbps interfaces will allow our customers to continue to meet their design goals at a fraction of the time and cost of alternative solutions."http://www.netronome.com

Monday, February 14, 2011

Netronome's SSL-Inspector Opens the Blind Spot of Encrypted Web Traffic

Netronome reports increased traction for its line of SSL Inspector appliances, which leverage the power of its network flow processors to decrypt SSL traffic traversing a corporate network perimeter.
The platform addresses the blind spot of SSL-encrypted email (such as Gmail), SaaS, social media and other peer-to-peer applications that default to SSL encryption. These encrypted sessions bypass the security coverage provided by the vast majority of intrusion detection systems, firewalls, data loss prevention systems and other cyber security applications. Netronome SSL Inspector appliances solve this problem by actively searching for SSL traffic, guaranteeing that all encrypted communications are detected and optionally inspected while maintaining up to 10 Gbps of network throughput.



The company is adding three new models to this product line, including fixed-configuration 1U appliances as well as modular 1U and 2U platforms. The resulting unmatched price, performance and interface options make SSL inspection a viable option in every unprotected network location.



The expanded product line of SSL Inspector appliances feature:

  • Interface flexibility: The platforms offer the highest number of 10/100, 1 GigE, and 10 GigE interfaces available in 1U and 2U systems.


  • Multi-segment support: Each platform supports multiple network segments, providing SSL inspection for the largest number of networks available in a 1U or 2U platform.


  • Unmatched price and performance options: The product line includes fixed configuration 1U appliances and modular 1U and 2U platforms that create the ideal combination of price, performance and port counts, enabling deployment in every network location from the branch office, enterprise WAN, data center and backbone.


  • Powerful hardware acceleration: The SSL Inspector appliances are powered by Netronome NFP-3240 network flow processors. The hardware acceleration and bulk cryptography engines provide stateful and context-aware inspection of all communications at line-rate with sub-50uS latency.
http://www.netronome.com http://www.ssl-inspector.com








The SSL Encrypted Traffic
Threat: Common Apps Pose Danger

Tuesday, February 8, 2011

Cavium, Kontron and Tata Elxsi Demo LTE eNode B

Cavium Networks Kontron and Tata Elxsi will showcase an LTE eNodeB solution at next week's Mobile World Congress 2011 in Barcelona based on Cavium OCTEON II multi-core processor as part of Kontron's open standard hardware running Tata Elxsi's LTE eNodeB L2/L3 software stack. The joint solution offers 3GPP Release 8 compliant LTE Layer 2 and Layer 3 processing that is capable of delivering up to 450 Mbps of aggregate throughput from a single AdvancedMC module featuring the OCTEON II CN6335 cnMIPS64 6-core processor.



The Cavium OCTEON II CN63XX processor family provides up to 9GHz of compute with a large 2MB L2 cache, DDR3 memory controller, security acceleration for SNOW 3G and KASUMI, TCP/IP, DPI, QoS and packet processing acceleration. Maximum power ranges from 7 to 17 watts from low-end to high-end. The OCTEON II processors have been designed into a range of tier-1 OEM systems ranging from eNodeB to packet-core platforms and services rich wireless infrastructure gateways.



The Kontron AM4211 ATCA Mezzanine Card (AMC) module can be configured with ATCA node blades and MicroTCA platforms (Picostation, Microstation to Macrostation). It is designed to support 1x 10GbE to the front and software configurable interfaces to the Fabric with either 2x PCIe x4 or SRIO which expands its application usage when configuring systems in combination with standards based third-party Digital Signal Processing (DSP) AMCs.



For control plane functions the Kontron AM4211 provides GbE on Ports 0 and 1 connected to the CN6335 processor and is fully software compatible with previous generation Kontron AMC packet processing modules, AM4204, AM4210 and AM4220, all based on OCTEON Plus processors from Cavium Networks. It is configurable with the Kontron MicroTCA 1U carrier-grade platform OM6061.



Tata Elxsi has architected its LTE eNodeB L2/L3 protocol stack to leverage the advanced hardware acceleration capabilities available in Cavium's OCTEON II multi-core processors, thereby delivering market-leading performance and scalability. The Tata Elxsi L2/L3 protocol stack also exploits the ability of the Cavium OCTEON II to support multiple virtual operating systems including Linux and Simple Executive to accelerate data plane performance.http://www.caviumnetworks.com

Netronome Appoints New CEO and CFO

Netronome, which specializes in network flow processors, named Howard Bubb as its new president and CEO and Perry Grace as CFO. Bubb most recently served as chairman and chief executive officer of fabless semiconductor company Ambric until its acquisition by Nethra in 2009. Previously, he held executive management positions at Intel including corporate officer and vice president of Intel's $1.7B Communications Infrastructure Group (CIG) which led the industry in network processors, embedded application processors, 10G optical modules and modular communications platforms. Bubb joined Intel through its acquisition of Dialogic, where he was CEO. Bubb replaces Netronome founder and CEO, Niel Viljoen, who has been responsible for the company's technology vision, and who will now become chief development officer.



Perry Grace joins Netronome from Zilog, Inc., a microcontroller company, where he served as the company's chief financial officer and executive vice president since 2001. During his time at Zilog, Grace led the company to a successful IPO in 2004 and was responsible for leading the finance, IT, legal, facilities and human resources functions. Prior to Zilog, Grace spent 12 years at National Semiconductor Corporation.http://www.netronome.com

Sunday, January 9, 2011

Cavium Offers "TurboDPI" Deep Packet Inspection Software

Cavium Networks introduced its "TurboDPI" off-the-shelf, multi-function security software optimized for its OCTEON II processors, enabling network equipment manufacturers to more easily integrate DPI features such as protocol analysis, application recognition, intrusion prevention, anti-malware protection, URL Filtering, unified threat management, antivirus gateways, subscriber charging, application aware QOS and service level agreements, usage monitoring and preventing denial of service.



Cavium said its TurboDPI software can be utilized inline or out of band to detect hundreds of protocols including Internet (HTTP, FTP etc), Email (IMAP, POP3, SMTP etc.), Web 2.0 (Facebook, Myspace, etc), Multimedia (Flash, Quicktime, YouTube, etc), Peer to Peer (Bittorrent, eDonkey, etc) and Voice and Messaging (Skype, GoogleTalk, Yahoo, etc). The software is highly customizable using a number of configurable detection engines for signature, heuristics and ports and also supports flow based detection. It is also extensible via customer plug-ins during design stage or in the field.



"As well as providing architectural, development and performance services, we now offer a complete ready to go DPI solution, not just APIs and toolkits, that can analyze the data stream to help identify protocols and applications, inappropriate URLs, intrusion attempts or malware, all in a single pass thru the data," said Safa Alkateb, general manager, Cavium Solutions and Services, "TurboDPI utilizes our advanced deep packet inspection acceleration hardware that is built into every one of our OCTEON II processors to enable our customers to quickly and seamlessly add DPI to their equipment for the first time or turbocharge their existing DPI designs."http://www.caviumnetworks.com

Thursday, January 6, 2011

Entropic and Cavium Team on MOCA 2.0

Entropic Communications and Cavium Networks announced an Ethernet to Coax Bridge (ECB) reference design that utilizes the latest MoCA 2.0 solution from Entropic Communications and Cavium's ECONA CNS3xxx energy efficient ARM based network processor.



Entropic's MoCA 2.0 solution consists of a 40nm baseband MAC/PHY SoC along with an RF transceiver plus analog front-end IC that provides 400 Mbps of aggregate net MAC throughput over 16 nodes and 500 Mbps of net MAC throughput for two node Turbo mode — with full backward interoperability to MoCA 1.1 devices. Cavium's ECONA CNS3xxx family of ARM-based, energy efficient processors offer multi-core processors, a rich set of integrated hardware accelerators and a range of I/Os for glueless voice, video and data connectivity. Sophisticated power management techniques enable super low-power operation, starting at less than 1 watt. http://www.entropic.com http://www.caviumnetworks.com

Wednesday, January 5, 2011

Cavium and ARM to Develop Next Gen Multi-Core SoCs

Cavium Networks' next-generation chips will be powered by ARM's Cortex-A family of processor cores.



Cavium's ECONA processor family has been based on ARM processor technology since its inception, first utilizing the ARM9 and then progressing to the ARM11 as market requirements have evolved. The companies said the transition to ARM's Cortex-A series will maintain and further develop Cavium ECONA processors' power/performance profile. The ARM processors are capable of gigahertz-class performance, while demonstrating low-power leadership. The ECONA family is targeted for applications that includes FTTH home gateway, network attached storage, small and medium business routers, service provider networking, enterprise wireless access points, multi-media tablets, and multi-function printers.



"Multi-core Cortex-A series processors will provide customers with a dramatic increase in performance over SMB networking solutions available today," explained Ian Drew, Chief Marketing Officer at ARM. "ARM pioneered licensable multi-core processor IP in 2005 with the ARM11 Core, and Cavium Networks' adoption of the Cortex-A series further is a strong indication of the success of the scalable, multi-core ARM architecture in the networking space."



Also based on ARM technology is Cavium Networks' family of PureVu video processors, which provide a full HD (1080p60) system-on-a-chip (SoC) solution for interactive and recording video applications.http://www.caviumnetworks.com http://www.arm.com

Monday, January 3, 2011

Cavium's WiVu Target Wireless Video Display

Cavium Networks unveiled its "WiVu" wireless video display solution
that combines its "PureVu" high performance video processors with wireless capabilities. The solution is designed to enable multi-room and interactive content distribution and access via any network at home, both wired and wireless, on a wide range of CE devices.



Cavium's PureVu video processors, which are optimized for low latency compression and robust, high fidelity media transmission, can now leverage 802.11 Wi-Fi.



"Cavium's WiVu leverages the latest notebook technologies such as embedded DisplayPort and Display Mini-Card (DMC) to provide a compelling high performance Wi-Fi based wireless display solution for multi-room and interactive applications", said Bruce Montag, Chairman of the Video Electronics Standards Association and Distinguished Engineer at Dell, Inc.



Key components of WiVu include support for widely deployed technologies, such as H.264, Wi-Fi, HDCP 2.0 and IP transport, along with high-performance video 2D and 3D video processor technology. WiVu also features back-channel over Wi-Fi to provide support for IR bridging, keyboard & mouse, touch-panels, and gaming controllers.http://www.caviumnetworks.com

Monday, December 13, 2010

AppliedMicro Debuts 100G OTN Muxponder

AppliedMicro introduced a 100G Muxponder (multiplexing transponder) solution for Optical Transport Networks (OTN) featuring an integrated framer/mapper PHY and the company's "SoftSilicon" flexibility . The 100G Muxponder can multiplex any combination of 10G and 40G client signals into a 100G OTN signal (OTU4).


The solution unifies AppliedMicro's TPO404 OTU4 multiplexer and PQ60T 10-40G mapper/framer with a common Application Programming Interface (API) that enables efficient integration and maintenance efforts for equipment vendors. AppliedMicro's 100G Muxponder supports any combination of signals from 10G and 40G Ethernet to legacy OC192/OC768 SONET/SDH, as well as 8G and 10G Fibre Channel. It also provides interoperability with all major forward error correction (FEC) schemes in long-haul optical network architectures. The company is offering reference platforms for 100G blades and systems. Pin-outs and data sheets are now available.
http://www.apm.com
  • In November, AppliedMicro introduced a family of 100 Gbps optical network processors for the Packet-Optical Transport System (P-OTS) and IP-over-DWDM transport markets. Leveraging SoftSilicon programmable technology developed by TPack, the new devices support the recently-adopted 100GE (IEEE ) and OTU4 (ITU-T) interface standards. The first two new devices in the family, TPOT414 and TPOT424, are 100G transponders for metro/core OTN and packet networks. The devices interface directly to CFP or MSA-168 type optical modules for standalone transponder applications or for line cards in larger systems. AppliedMicro said its SoftSilicon technology enables the same device to be configured to run as an 100GE-OTU4 transponder or as an OTU4-OTU4 transponder. The soft approach also enables flexibility as specs are updated.


  • Earlier this year, AppliedMicro acquired TPACK A/S, a developer of programmable chip solutions for packet transport networks, for $32 million in cash plus up to $5 million in cash earn-outs depending on performance milestones over the next eighteen months. TPACK, which is based in Copenhagen, Denmark, developed a "SOFTSILICON" solution implemented in Altera FPGA devices. The SOFTSILICON products are used in 10, 40 and 100 Gbps OTN switching and routing network equipment.

Sunday, November 14, 2010

Cavium Scales its OCTEON II Processor Line

Cavium Networks is extending its family of OCTEON II processors with four new processor lines that integrate one to ten cnMIPS64 cores. The additions expand both low and mid range options in a fully software compatible manner with other members of the OCTEON II and OCTEON Plus family, enabling enterprise, data center and service provider equipment including routers, switches, appliances, 3G/4G wireless base stations, RNCs, xGSNs, evolved packet core, services gateways, DPI equipment, storage switches and intelligent server adapters. In addition, Cavium is introducing four new, unique technologies in Octeon II to achieve lower power, deep packet inspection, virtualization and anti-counterfeiting.


The OCTEON II family combines multiple cnMIPS64 R2 cores along with L2-L7 application and security acceleration engines, virtualization features and 100Mbps - 100Gbps of connectivity. The custom designed cnMIPS™ cores implement an enhanced MIPS64 R2 instruction-set and have been architected to deliver superior performance per area along with dedicated compute and cache resources essential for deterministic, low-latency performance.


The newly introduced OCTEON II processors and target applications include:


CN60XX (1 - 2 Cores): WLAN Access points (AP), Entry-level VPN/UTM/Firewalls, Low-cost Control Plane applications, Satellite and Broadband Gateways.


CN61XX and CN62XX (2 -- 4 Cores): Enterprise Switches & Routers with Integrated Data and Control, High-performance Control Plane, UTM & Security Appliances, Printers, Small to Medium Business (SMB) and Low to Mid-range Enterprise class NAS/iSCSI appliances.


CN66XX (6 -- 10 cores): WAN Optimization, Enterprise, Data Center and Storage applications requiring 2x10GbE performance and connectivity and High-performance 3G/4G Base Stations.


These new processors incorporate a range of hardware accelerators including L2-L7 application and security acceleration engines, TCP offload, load balancing, compression and support for virtualization.


The four new technologies in OCTEON II include:


1. Power Optimizer that dynamically adjusts power in real time depending upon the application-level processing requirement, without the need to adjust CPU voltage or clock frequency. Now application developers can specify the maximum power that a program is allowed to consume on a per core basis.


2. "Hyper Finite Automata" (HFA) provides the industry's best Deep Packet Inspection solution by combining both DFA and NFA architectures into one cohesive solution. Performance is unchanged regardless of the number of rules and number of flows that are processed.


3. "EmVisor" provides unprecedented hardware support for a complete SoC virtualization. Now OCTEON II CPUs can act like a series of Virtual SoCs, each with their own virtual memory, Ethernet ports, PCIe Bus and EmVisor also provides a virtual switch between Virtual SoCs. This also enables in-field software upgrades in customer equipment.


4. "Authentik" is a technology that allows the whole multi-core processing chip to be locked; so that OEMs that entrust third parties to assemble their systems can be assured that no rogue or counterfeit copies of their systems are also being manufactured.
http://www.caviumnetworks.com

Sunday, November 7, 2010

AppliedMicro Debuts 100G OTN Devices

AppliedMicro introduced a family of 100 Gbps optical network processors for the Packet-Optical Transport System (P-OTS) and IP-over-DWDM transport markets.


Leveraging SoftSilicon programmable technology developed by TPack, the new devices support the recently-adopted 100GE (IEEE ) and OTU4 (ITU-T) interface standards. The first two new devices in the family, TPOT414 and TPOT424, are 100G transponders for metro/core OTN and packet networks. The devices interface directly to CFP or MSA-168 type optical modules for standalone transponder applications or for line cards in larger systems.


AppliedMicro said its SoftSilicon technology enables the same device to be configured to run as an 100GE-OTU4 transponder or as an OTU4-OTU4 transponder. The soft approach also enables flexibility as specs are updated.


"With products offering 100G capacity, network operators will be able to take advantage of recent standards to deploy new equipment that significantly expands capacity for optical transport networks," said Colin Macnab, President of AppliedMicro TPACK A/S. "The SoftSilicon programmable technology of TPOT414 and TPOT424 reduces the 100G adoption risk while providing customers with the ability to change and add functionality in the field. For telecom equipment manufacturers, these products lower the development costs of deploying next-generation services."http://www.apm.com
  • Earlier this year, AppliedMicro acquired TPACK A/S, a developer of programmable chip solutions for packet transport networks, for $32 million in cash plus up to $5 million in cash earn-outs depending on performance milestones over the next eighteen months. TPACK, which is based in Copenhagen, Denmark, developed a "SOFTSILICON" solution implemented in Altera FPGA devices. The SOFTSILICON products are used in 10, 40 and 100 Gbps OTN switching and routing network equipment. Its silicon intellectual property (IP) for mapping and switching functions enable rapid time-to-market for Optical Transport Network (OTN) and Carrier Ethernet markets. Carrier Ethernet, in particular, has become TPACK's speciality whether it is transported over Ethernet, MPLS, VPLS, PWE3, PBT/PBB-TE, T-MPLS, SONET/SDH, PDH or OTN.

Monday, October 25, 2010

Cavium's NITROX III Packs 16-64 Cores for 40 Gbps Security

Cavium Networks unveiled its NITROX III family of security processors that integrate 16 to 64 purpose-built security RISC cores with high performance compression engines, virtualization hardware and a PCI-Express Gen 2 interface. The processors, which are aimed at secure and virtualized cloud computing and the borderless enterprise applications, deliver performance is up to 10 times greater than alternative multi-chip solutions within the same power envelope.


Cavium said its NITROX III Security Processor family will deliver unmatched SSL and security performance, virtualization features, compression performance and very low power consumption. Product designs will offer up to 64 cores for up to 40Gbps of security performance. The designs will also support 200K RSA Ops/sec for 1024 bit keys and 35K RSA Ops/sec for 2048 bit keys.
http://www.cavium.com

Sunday, September 26, 2010

AppliedMicro Introduces PacketPro Multicore Processor

AppliedMicro introduced its next-generation PacketPro multicore processor System-on-a-Chip (SoC) family designed for multifunction printers, network control planes, access points, and industrial/security applications.



PacketPro is AppliedMicro's second-generation embedded processor SoC family and features offload of critical features for multiple PowerPC processors with frequency capabilities ranging in performance from 600 MHz to 2.0 GHz and up. The line will employ 40nm technology and usage-based power management to reduce energy consumption. A multi-level crypto engine offers simultaneous wire-speed performance along with investment protection against product cloning and hardware-software tampering.


"PacketPro is an advanced SoC architecture that offers an ideal combination of high-performance and low power consumption at low cost," said Vinay Ravuri, Vice President and General Manager of AppliedMicro's Processing Products Division. "Flexible power management enables deep sleep operating power of less than 200mW and includes Wake on LAN, USB, PCIe and others. With the ability to scale-down and turn off SoC resources when not in use and to scale-up to full power when system demands require, PacketPro provides developers unprecedented ability to dynamically control power consumption levels."


Some key features include: performance of up to 2 GHz per core, 32KB L1 I/D & 256KB dedicated L2 cache per core, support for full symmetric multiprocessing (SMP) and ultra flexible asymmetric multiprocessing (AMP). Memory and bus architecture supports 16/32/64-bit DDR2/3 up to 1,600Mbps and beyond with ECC option. Connectivity features include PCI-e Gen 2 controller, GE, 10GE, SGMII, RGMII, IEEE1588 Rev2 on all Ethernet ports, USB 2.0 - H/D, OTG, all with integrated PHY, USB 3.0, SATA ports and SDHC. The PacketPro family is manufactured on a 40nm TSMC CMOS process and is available in both wire-bond and flip-chip packaging. The first PacketPro device begins sampling in November. http://www.appliedmicro.com

Monday, September 20, 2010

Cavium Announces OCTEON II PCI-Express Gen2 Adapters

Cavium Networks introduced an Intelligent Network Adapter family based on OCTEON II CN63XX processor family. The Adapters deliver 10Gbps performance for applications such as Data Center security, cloud computing, network and storage data compression, Deep Packet Inspection, WAN optimization, TCP/IP Offload and iSCSI Offload.


The new adapters offer high performance networking, compression, storage features, DPI functionality with dual 10 Gigabit Ethernet interfaces in a single PCI-Express Gen2 form factor. The Intelligent Network Adapters also support non volatile memory (NVRAM) for data retention and failover in SSD deployments. Three models are being introduced: a two port 10Gigabit Ethernet adapter for inline acceleration and offload, a four port Gigabit Ethernet adapter and a coprocessor adapter for look-aside offload. All adapters have PCI-Express Gen2.0 connectivity. All of the above adapters have a DDR3 DIMM slot that can support up to 8GB of 1333 DDR3 Memory and NVRAM capability. The adapters also support an optional 1GB of DDR3 HFA memory for Deep Packet Inspection. Sampling begins in Q4.

http://www.caviumnetworks.com

See also