Saturday, October 10, 2015

Australian Researchers Build Quantum Logic Gate in Silicon

Researchers at the University of New South Wales in Australia have built a quantum logic gate in silicon for the first time -- a major step toward quantum computers.

“We’ve demonstrated a two-qubit logic gate – the central building block of a quantum computer – and, significantly, done it in silicon. Because we use essentially the same device technology as existing computer chips, we believe it will be much easier to manufacture a full-scale processor chip than for any of the leading designs, which rely on more exotic technologies," stated Andrew Dzurak, Scientia Professor and Director of the Australian National Fabrication Facility at UNSW.

“This makes the building of a quantum computer much more feasible, since it is based on the same manufacturing technology as today’s computer industry,” he added.

Professor Kohei M. Itoh from Keio University in Japan provided specialised silicon wafers for the project.

NIST Researchers Teleport Quantum State over 100km of Fiber

Researchers from the National Institute of Standards and Technology (NIST) and NTT have transferred quantum information carried in light particles over 100 km of optical fiber, four times farther than the previous record. The breakthrough could lead to quantum repeaters, opening the door to quantum communications over long distances of fiber. Previously, quantum state has been teleported over free space, but transfers over optical have been limited...

NTT and University of Tokyo Cite Progress in Quantum Cryptography

Nippon Telegraph and Telephone(NTT) and The University of Tokyo reported progress in developing a quantum cryptography scheme that can assure security without monitoring the error rate of photon transmission. In an article in the UK science journal “Nature Photonics”, the researchers describe a quantum key distribution (QKD) experiment based on a novel QKD scheme called the round-robin differential phase shift (RRDPS) protocol. NTT said the experiment...

Intel Invests in QuTech for Quantum Computing

Intel will invest US$50 million and provide significant engineering resources to Delft University of Technology and TNO, the Dutch Organisation for Applied Research, to accelerate advancements in quantum computing. Intel said its goal is to extend the university's physics expertise and diverse quantum computing research efforts by contributing advanced manufacturing, electronics and architectural expertise. "A fully functioning quantum computer...

Altera Demos FPGAs for CCAP Architecture

Altera demonstrated its new, flexible and upgradeable silicon solution for  multi-service operators (MSOs) adopting distributed CCAP (converged cable access platform) architecture.

The Altera DOCSIS Remote (MAC) PHY design, which is being demonstrated with partners Analog Devices, and Capacicom, enables cable operators to more efficiently and cost-effectively meet the ever-increasing need to segment cable networks, driven by the demand of high-speed Internet, unicast 4K video and other multimedia content.

The solution uses Altera Arria 10 FPGAs and Analog Devices' class-leading digital-to-analog converters (DACs) and analog-to-digital converters (ADCs), combined with Capacicom's MAC and PHY implementation, resulting in state-of-the-art radio frequency (RF) performance.

"With today's Altera FPGA portfolio and onward technology roadmap coupled with Capacicom's substantial experience in DOCSIS PHY and MAC layers, ADI has now found the perfect combination of partners to extend its leadership in high-performance analog into cable infrastructure solutions," said Carlton Lane, Analog Devices cable solutions manager. "ADI, Altera and Capacicom have set up a long-term collaboration to create the semiconductor industry reference platform for R - (MAC) PHY, with a continuing roadmap commitment to the lowest power consumption and cost per port."

Arria 10 FPGAs and SoCs deliver the highest performance at 20 nm.  The company said its Arria 10 FPGAs and SoCs are up to 40 percent lower power than previous generation FPGAs and SoCs and feature the industry's only hard floating-point digital signal processing (DSP) blocks with speeds up to 1,500 giga floating-point operations per second (GFLOPS).

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