Tuesday, February 19, 2013

Tilera Chips Packs 72 64-bit Cores, 100G Network I/O

Tilera introduced a processor packing 72 power-efficient cores, 100 Gbps I/O and four high-performance DDR3 memory controllers.  The design targets Big Data appliances, such as L2-7 networking and firewall platforms and high-throughput SDN equipment.

The TILE-Gx72 leverages Tilera’s iMesh-dimensional interconnect, DDC distributed coherent cache, and TileDirect direct-to-cache I/O. The new design doubles the performance of the company's TILE-Gx36 processor introduced a year ago.
Tilera said its silicon will be capable of performing network monitoring and analytics with 100% line-rate packet capture at 100 Gbps.

“The TILE-Gx72 rounds out our processor portfolio, complementing our 9, 16 and 36-core TILE-Gx processors and is offering a remarkable range of processing performance,” said Devesh Garg, president and CEO of Tilera. “Customers demand ever-increasing levels of performance and performance-per-watt to stay competitive and they simultaneously want to reuse their software and hardware investments across their product portfolio.  The TILE-Gx72 brings an unprecedented amount of compute to customer designs, and leverages thousands of open source libraries and the growing Linux ecosystem.”


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