Sunday, July 25, 2010

NetLogic Packs 128 CPUs for 240 Million PPS Performance

NetLogic Microsystems unveiled a multi-core communications processor solution that integrates 128 NXCPUs and over 160 programmable processing engines to deliver 160Gbps throughput and 240 million packets-per-second (Mpps) of intelligent application performance for next-generation 3G/4G mobile wireless infrastructure, enterprise, storage, security, metro Ethernet, edge and core infrastructure network applications.

The new NetLogic XLP8128S multi-core processor solution leverages the company's XLP processor architecture to offer scalability to 128 NXCPUs, each operating at up to 2.0 GHz and based on its superscalar engine and out-of-order execution capabilities for converged data plane and control plane processing.

The 128 NXCPUs offer full cache and memory coherency over the high-speed Inter-chip Coherency Interface (ICI), enabling software applications to seamlessly run in Symmetric Multi Processing (SMP) or Asymmetric Multi Processing (AMP) modes. The company said its unique combination of superior processor cores and scalability from 1 to 128 NXCPUs deliver over 240 Mpps of intelligent application processing performance, making it the highest performance multi-core communications processors for intelligent Layers 4-7 network, services and application processing.

"Our ability to scale to 128 NXCPUs with full cache and memory coherency to deliver 160Gbps throughput and over 240Mpps of application performance is unprecedented in the industry, and enables a new class of equipment for our customers," said Behrooz Abdi, executive vice president and general manager at NetLogic Microsystems. "We are excited to continue to be at the forefront of technology innovation in the area of multi-core processing for next-generation network and communications infrastructure, security and storage applications."

The XLP8128S solution features NetLogic Microsystems' high-speed, low-latency Enhanced Fast Messaging Network to enable efficient, high-bandwidth communication among the 128 NXCPUs and to support billions of in-flight messages and packet descriptors between all on-chip elements. To complement the 128 NXCPUs, the XLP8128S solution offers over 160 fully-autonomous processing engines that provide independent and complete offload of certain network functions from the NXCPUs, including:

  • 160 Gbps fully-autonomous Security Acceleration Engine supporting networking, wireless and storage encryption/decryption/authentication protocols

  • 160 Gbps Network Acceleration Engines for Ingress/Egress Packet Parsing and Management

  • 512 Gbps RAID-5/RAID-6 Acceleration

  • 40 Gbps Compression/Decompression

  • Packet Ordering

  • Storage De-Duplication Acceleration

  • TCP Segmentation Offload

  • IEEE 1588 Hardware Time Stamping

The XLP8128S solution will sample in Q3 2010.