Sunday, April 15, 2007

Kasenna Delivers Its Third-Generation IPTV Middleware PortalTV

Xilinx unveiled a new reference design for video-over-IP and IPTV applications. The Xilinx design supports multiple channels in and out, bridging between DVB-ASI and Ethernet IP packets, and forward error correction (FEC) using the ProMPEG Code of Practice 3 (CoP3) -- for compressed transport streams and uncompressed SDI video sources. Additional flexibility is provided through a choice of memory and processor configurations to closely match technical requirements.

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