Tuesday, August 9, 2016

Cisco Contributes Full Duplex DOCSIS Chip Design

Cisco is contributing a silicon reference design for Full Duplex DOCSIS to the cable industry on a royalty-free basis.

Specifically, Cisco is offering a validated reference design for a digital echo canceler that maximizes the use of HFC capacity. Over the past 2 year, a team of Cisco engineers have defined a multi-slice scalable echo canceler (EC) for the Full Duplex DOCSIS specification that seamlessly integrates with the Cable Modem Termination System (CMTS) architecture. The technology is scalable for a return path from 200 MHz (1.7 Gbps) to 1.2 GHz (10 Gbps).


“By making this royalty-free design available to the industry, we can help our cable customers evolve to more rapidly deploy virtualized, fiber-deep, and all-IP infrastructures,” said John Chapman, Cisco fellow and CTO, Cable Access Business. “We hope to accelerate the transformation of the cable industry to deliver multi-gigabit speeds and new high bandwidth services and products, and in the near future, customers can begin to enjoy the benefits of Full Duplex DOCSIS technology.”

“DOCSIS 3.1 Full Duplex with up to 50 times more upstream capacity than today and echo cancellation technology, is further evidence that DOCSIS and the cable network itself has a long, useful life ahead,” said Jeff Finkelstein, executive director, Network Strategy, Cox Communications. “The work being done on Full Duplex by the MSO, vendor and CableLabs team shows that the cable network will continue to evolve and deliver high bandwidth services for many years, enabling our customers to enjoy the services most important to them to meet their future needs.”

https://newsroom.cisco.com/press-release-content?type=press-release&articleId=1783429

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