Monday, February 23, 2015

EZchip's TILE-Mx100 Processors Targets 100 64-bit ARM CPU Cores

EZchip Semiconductor announced plans for a TILE-Mx multicore processor that will integrate one hundred ARMv8-A 64-bit cores, a highly efficient mesh for linear scaling of the interconnected cores, and accelerators for packet processing on a single chip.  The company aims to sample the TILE-Mx in the second half of 2016.  Smaller versions with 64 and 36 cores will also be offered.

The new processor, which leverages technology acquired from Tilera, is being designed for high-performance network applications and network functions virtualization (NFV). EZChip said its TILE-Mx will use a unique mesh architecture with coherent cache and massive bandwidth that provides linear scaling of application performance. EZchip's hardware-based accelerators include a traffic manager featuring 256K queues with traffic shaping, policing and SLA (Service Level Agreements) enforcement, hardware accelerated packet classification and table lookups for millions of flows, statistics updating for millions of counters, pattern matching, cryptography and public-key acceleration. In addition, the chip will boast an optimized memory architecture with extremely high bandwidth to both the internal and external memories, and numerous interfaces for 1GE, 10GbE, 25GbE, 40GbE, 50GbE and 100-Gigabit Ethernet as well as PCI-Express.

"We are bringing to the market a new type of highly differentiated multicore processor, leveraging the best from EZchip's and Tilera's technologies, and specifically architected to address the next generation of high-performance data center, cloud and carrier networks," said Eli Fruchter, CEO of EZchip. "The combination of EZchip's and Tilera's market-proven leading technologies enables us to develop a new multicore processors family that uniquely integrate powerful networking capabilities together with the highest number of processor cores to address a wide range of applications and market segments. While our NPU portfolio and, in particular, the new NPS is the highest performance merchant NPU, we expect the TILE-Mx to be the highest performance multicore CPU. As we have accomplished in the NPU market, we believe that through the strongly differentiated technology that we are now developing we will dramatically increase our share in the multicore market in coming years and become a leader in the multicore CPU market."


http://www.ezchip.com/News/PressRelease/?ezchip=97

In July 2014, EZchip Semiconductor agreed to acquire Tilera Corporation, a developer of high-performance multi-core processors, up to $130 million in cash.  The deal includes $50 million at closing and up to an additional $80 million is payable subject to the attainment of certain future performance milestones.

Tilera, which is based in San Jose, California, offers a line of multi-core processors, network interface cards and white-box appliances for data center networking equipment.

At the high end, Tilera's TILE-Gx8072 Processor includes 72 identical processor cores (tiles) interconnected with the company's iMesh on-chip network. Each tile consists of a 64-bit processor core as well as L1 and L2 cache and a non-blocking Terabit/sec switch that connects the tiles to the mesh and provides full cache coherence among all the cores. The company offers smaller versions with 9- 16, and 36-cores. Tilera offers its own line of accelerator cards based on its processors, as well as two 1RU appliances.

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