Sunday, July 17, 2005

Intel's Itanium2 Processors Get 667 MHz Bus Architecture

Intel introduced two Itanium 2 processors with a 667 megahertz (MHz) front side bus (FSB), which connects and transfers data between the microprocessor, chipset and system's main memory. Servers designed to utilize the new bus are expected to deliver more than 65% greater system bandwidth over servers designed with current Itanium 2 processors with a 400 MHz FSB. The improved front side bus bandwidth allows for 10.6 gigabits of data per second to pass from the processor to other system components. In contrast, the current generation 400 MHz FSB transfers 6.4 gigabits of data per second.


Intel said this new capability will help set the stage for the forthcoming dual core Itanium processor, codenamed "Montecito," which will feature the same bus architecture. Platforms using Montecito are expected to deliver up to twice the performance, up to three times the system bandwidth, and more than 2 1/2 times as much on-die cache as the current generation of Itanium processors. While boosting performance, Montecito is expected to also deliver more than 20% lower power than previous generations of Itanium processors due to new technologies for power management. Montecito will also have Intel Hyper-Threading technology, enabling four times the threads as the current generation.
http://www.intel.com

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